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| Si2400 V. 22 B I S I S OMODEM (R) W I T H IN T E G R A T E D GLOBAL D A A Features i2 40 0 S Data Modem Formats 2400 bps: V.22bis 1200 bps: V.22, V.23, Bell 212A 300 bps: V.21, Bell 103 Fast Connect and V.23 Reversing SIA and other security protocols Integrated DAA Capacitive Isolation Parallel Phone Detect Globally Compliant Line Interface Overcurrent Detection Caller ID Detection and Decode DTMF Tone Gen./Detection 3.3 V or 5.0 V Power UART with Flow Control AT Command Set Support Integrated Voice Codec PCM Data Pass-Through Mode HDLC Framing in Hardware Call Progress Support Pb-Free/RoHS-Compliant Packages Available Ordering Information See page 90. Pin Assignments Si2400 Applications Set Top Boxes Power Meters Security Systems ATM Terminals Medical Monitoring Point-of-Sale XTALI XTALO CLKOUT VD RXD* TXD* CTS RESET 1 2 3 4 5 6 7 8 S 16 15 14 13 12 11 10 9 EOFR/GPIO1 CD/AIN/GPIO2 ESC/GPIO3 ISOB GND C1A ALERT/GPIO4 AOUT Description The Si2400 ISOmodem(R) is a complete modem chipset with integrated direct access arrangement (DAA) that provides a programmable line interface to meet global telephone line requirements. Available in two 16pin small outline (SOIC) packages, it eliminates the need for a separate DSP data pump, modem controller, analog front end (AFE), isolation transformer, relays, opto-isolators, 2- to 4-wire hybrid, and voice codec. The Si2400 is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. Si3015 QE2 DCT IGND C1B RNG1 RNG2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FILT2 FILT RX REXT REXT2 REF VREG2 VREG Functional Block Diagram Si2400 RXD TXD Si3015 RX QB QE UART MUX Controller (AT Decoder Call Progress) Isolation Interface RESET EO FR/G PIO 1 CD/AIN/G PIO 2 ESC/G PIO 3 ALERT/G PIO 4 CTS Audio Codec Clock Interface Control Interface DSP (Data Pump) Isolation Interface Hybrid and DC Termination FILT FILT2 REF DCT VREG VREG2 REXT REXT2 RNG 1 RNG 2 QB QE QE2 Patents pending Ring Detect O ff-Hook CLKOUT XTALI XTALO AOUT Rev. 1.3 8/06 Copyright (c) 2006 by Silicon Laboratories i3 0 15 Si2400 Si2400 2 Rev. 1.3 Si2400 TABLE O F CONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4. Analog Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1. Digital Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2. Configurations and Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3. Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4. Global DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.5. Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.6. Loop Current Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.7. Carrier Detect/Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.8. Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.9. Caller ID Decoding Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 5.10. Tone Generation and Tone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 5.11. PCM Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.12. Analog Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.13. V.23 Operation/V.23 Reversing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.14. V.42 HDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.15. Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.16. Clock Generation Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6. AT Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 6.1. Command Line Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.2. < CR > End Of Line Character . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.3. AT Command Set Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 6.4. S-Register Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6.5. Alarm Industry AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 6.6. Modem Result Codes and Call Progress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 7. Low Level DSP Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 7.1. DSP Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 7.2. Call Progress Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 8. S Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Appendix A--DAA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Appendix B--Typical Modem Applications Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . .84 Appendix C--UL1950 3rd Edition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 9. Pin Descriptions: Si2400 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 10. Pin Descriptions: Si3015 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88 11. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 12. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94 Rev. 1.3 3 Si2400 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter1 Ambient Temperature Ambient Temperature Si2400 Supply Voltage, Digital3 Symbol TA TA VD Test Condition K-Grade B-Grade Min2 0 -40 3.0 Typ 25 25 3.3/5.0 Max2 70 85 5.25 Unit C C V Notes: 1. The Si2400 specifications are guaranteed when the typical application circuit (including component tolerance) and any Si2400 and any Si3015 are used. See Figure 3 on page 10 for a typical application circuit. 2. All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 C unless otherwise stated. 3. The digital supply, VD, can operate from either 3.3 V or 5.0 V. The Si2400 interface supports 3.3 V logic when operating from 3.3 V. The 3.3 V operation applies to both the serial port and the digital signals CTS, CLKOUT, GPIO1-4, and RESET. 4 Rev. 1.3 Si2400 Table 2. Loop Characteristics (VD = 3.0 to 5.25 V, TA = 0 to 70C for K-Grade and -40 to 85C for B-Grade, See Figure 1) Parameter DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage DC Termination Voltage Symbol VTR VTR VTR VTR VTR VTR VTR VTR VTR Test Condition IL = 20 mA, ACT = 1b DCT = 11b (CTR21) IL = 42 mA, ACT = 1b DCT = 11b (CTR21) IL = 50 mA, ACT = 1b DCT = 11b (CTR21) IL = 60 mA, ACT = 1b DCT = 11b (CTR21) IL = 20 mA, ACT = 0b DCT = 01b (Japan) IL = 100 mA, ACT = 0b DCT = 01b (Japan) IL = 20 mA, ACT = 0b DCT = 10b (FCC) IL = 100 mA, ACT = 0b DCT = 10b (FCC) IL = 15 mA, ACT = 0b DCT = 00b (Low Voltage) VTR = -48V FCC/Japan Modes CTR21 Mode DC current flowing through ring detection circuitry 1 Min -- -- -- 40 -- 9 -- 9 -- Typ -- -- -- -- -- -- -- -- -- Max 7.5 14.5 40 -- 6.0 -- 7.5 -- 5.2 Unit V V V V V V V V V On Hook Leakage Current2 Operating Loop Current Operating Loop Current DC Ring Current2 ILK ILP ILP -- 13 13 -- -- -- -- -- 7 120 60 7 A mA mA A Ring Detect Voltage3 Ring Detect Voltage3 Number5 Ring Frequency4 Ringer Equivalence VRD VRD FR REN RT = 0b RT = 1b 11 17 15 -- -- -- -- -- 22 33 68 0.2 VRMS VRMS Hz Notes: 1. SF[4] (ACT); SF5[3:2] (DCT); SF5[0] (RT). 2. R25 and R26 installed. 3. The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected above the maximum. 4. The Si2400 ring detector can be programmed to detect rings between this range. 5. C15, R14, Z2, and Z3 not installed. SF5[1] (RZ) = 0b. See "Ringer Impedance" on page 80. Rev. 1.3 5 Si2400 Table 3. DC Characteristics1 (VD = 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Low Level Output Voltage, GPIO1-4 Input Leakage Current CTS Leakage to Ground2 Power Supply Current, Digital3 Power Supply Current, DSP Power Down3 Power Supply Current, Wake-On-Ring (ATZ) Power Supply Current, Total Power Down Symbol VIH VIL VOH VOL VOL IL ICL ID ID ID ID Test Condition Min 2.1 -- Typ -- -- -- -- -- -- 10 28 16 10 12 Max -- 0.8 -- 0.4 0.6 10 -- 32 19 11 15 Unit V V V V V A A mA mA mA A IO = -2 mA IO = 2 mA IO = 20 mA 2.4 -- -- -10 -- VD pin VD pin VD pin VD pin -- -- -- -- 1. Measurements are taken with inputs at rails and no loads on outputs. 2. Must be met in order to avoid putting the Si2400 into factory test mode. 3. Specifications assume SE1[7:6] (MCKR) = 00b (default). Typical value is 4 mA lower when MCKR = 01b and 6 mA lower when MCKR = 10b. Table 4. DC Characteristics1 (VD = 3.0 to 3.6 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Low Level Output Voltage, GPIO1-4 Input Leakage Current CTS Leakage to Ground2 Power Supply Current, Digital3 Power Supply Current, DSP Power Down3 Power Supply Current, Wake-On-Ring Power Supply Current, Total Power Down Symbol VIH VIL VOH VOL VOL IL ICL ID ID ID ID Test Condition Min 2.1 -- Typ -- -- -- -- -- -- 3 15 9 5 10 Max -- 0.8 -- 0.35 0.6 10 -- 21 14 8 12 Unit V V V V V A A mA mA mA A IO = -2 mA IO = 2 mA IO = 15 mA 2.4 -- -- -10 -- VD pin VD pin VD pin VD pin -- -- -- -- 1. Measurements are taken with inputs at rails and no loads on outputs. 2. Must be met in order to avoid putting the Si2400 into factory test mode. 3. Specifications assume SE1[7:6] (MCKR) = 00b (default). Typical value is 4 mA lower when MCKR = 01b and 6 mA lower when MCKR = 10b. 6 Rev. 1.3 Si2400 TIP + 600 Si3015 V TR 10 F RING - IL Figure 1. Test Circuit for Loop Characteristics Table 5. AC Characteristics (VD = 3.0 to 3.6 V, or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter Sample Rate Crystal Oscillator Frequency Transmit Frequency Response Receive Frequency Response Transmit Full Scale Level1 Receive Full Scale Level1 Dynamic Range3,4,5 Dynamic Range3,4,7 Dynamic Range3,4,5 Transmit Total Harmonic Distortion5,8 Transmit Total Harmonic Distortion6,8 Receive Total Harmonic Distortion7,8 Receive Total Harmonic Distortion5,8 Caller ID 60 Hz Common Mode Tolerance9 Symbol Fs FXTL Test Condition Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 91 Typ 9.6 4.9152 5 5 1 1.58 1 1.58 82 83 84 -85 -76 -74 -82 120 Max -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Unit KHz MHz Hz Hz VPEAK VPEAK VPEAK VPEAK dB dB dB dB dB dB dB VPEAK VFS VFS DR DR DR THD THD THD THD VCM Low -3 dBFS Corner Low -3 dBFS Corner FULL = 0 (-1 dBm) FULL = 1 (+3.2 dBm)2 FULL = 0 (-1 dBm) FULL = 1 (+3.2 dBm)2 ACT6 = 0b, DCT6 = 10b (FCC) IL=100 mA ACT = 0b, DCT = 01b (Japan) IL = 20 mA ACT = 1b, DCT = 11b (CTR21) IL = 60 mA ACT = 0b, DCT = 10b (FCC) IL = 100 mA ACT = 0b, DCT = 01b (Japan) IL = 20 mA ACT = 0b, DCT = 01b (Japan) IL = 20 mA ACT = 1b, DCT = 11b (CTR21) IL = 60 mA > 60 dB line balance at 60 Hz Notes: 1. Measured at TIP and RING with 600 termination at 1 kHz. 2. R2 should be changed to a 243 resistor when the SF5[7] (FULL) = 1b. 3. DR = 20 x log |Vin| + 20 x log (RMS signal/RMS noise). 4. Measurement is 300 to 3400 Hz. Applies to both transmit and receive paths. 5. Vin = 1 kHz, -3 dBFS, Fs = 10300 Hz. 6. ACT = SF5[4]; DCT = SF5[3:2]. 7. Vin = 1 kHz, -6 dBFS, Fs = 10300 Hz. 8. THD = 20 x log (RMS distortion/RMS signal). 9. VCM can be improved to 120 Vrms minimum by placing a 20 M resistor across the C9 capacitor. Rev. 1.3 7 Si2400 Table 6. Voice Codec AC Characteristics (VD = 3.0 to 3.6 V or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter AOUT Dynamic Range, APO = 0 AOUT THD, APO = 0 AOUT Full Scale Level, APO = 0 AOUT Mute Level, APO = 0 AOUT Dynamic Range, APO = 1, VD = 4.75 to 5.25 V AOUT Dynamic Range, APO = 1, VD = 3 to 3.6 V AOUT THD, APO = 1, VD = 4.75 to 5.25 V AOUT THD, APO = 1, VD = 3 to 3.6 V AOUT Full Scale Level, APO = 1 AOUT Mute Level, APO = 1 AOUT Resistive Loading, APO = 1 AOUT Capacitive Loading, APO = 1 AIN Dynamic Range, VD = 4.75 to 5.25 V AIN Dynamic Range, VD = 3 to 3.6 V AIN THD, VD = 4.75 to 5.25 V AIN THD, VD = 3 to 3.6 V AIN Full Scale Level* Symbol Test Condition VIN = 1 kHz VIN = 1 kHz Min -- -- -- -- Typ 40 -40 0.7 VDD 60 65 65 -60 -60 1.5 -65 -- -- 65 65 -60 -60 2.8 Max -- -- -- -- -- -- -- -- -- -- -- 20 -- -- -- -- -- Unit dB dB VPP dB dB dB dB dB VPP dB k pF dB dB dB dB VPP VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB -- -- -- -- -- -- 10 -- VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB VIN = 1 kHz, -3 dB -- -- -- -- -- *Note: Receive full scale level will produce -0.9 dBFS at RXD. Table 7. Absolute Maximum Ratings Parameter DC Supply Voltage Input Current, Si2400 Digital Input Pins Digital Input Voltage Operating Temperature Range--B-Grade Operating Temperature Range--K-Grade Storage Temperature Range Symbol VD IIN VIND TA TA TSTG Value -0.5 to 6.0 10 -0.3 to (VD + 0.3) -50 to 95 -10 to 80 -40 to 150 Unit V A V C C C Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 8 Rev. 1.3 Si2400 Table 8. Switching Characteristics (VD = 3.0 to 3.6 V or 4.75 to 5.25 V, TA = 0 to 70C for K-Grade, TA = -40 to 85C for B-Grade) Parameter CLKOUT Output Clock Frequency Symbol tbd tsbc tcsb trs trs2 trs3 Min 2.4576 Typ -- Max 39.3216 Unit MHz Baud Rate Accuracy Start Bit to CTS CTS Active to Start Bit RESET to RESET RESET Rise Time RESET to TXD -1 -- 10 5.0 -- 3 -- 1/(2 Baud Rate) -- -- -- -- 1 -- -- -- 100 -- % ns ns ms ns ms Note: All timing is referenced to the 50% level of the waveform. Input test levels are VIH = VD - 0.4 V, VIL = 0.4 V Receive Tim ing RXD 8-Bit Data Mode (Default) Start D0 D1 D2 D3 D4 D5 D6 D7 Stop RXD 9-Bit Data Mode Start D0 D1 D2 D3 D4 D5 D6 D7 D8 Stop Transm it Tim ing TXD 8-Bit Data Mode (Default) Start D0 D1 D2 D3 D4 D5 D6 D7 Stop TXD 9-Bit Data Mode Start D0 D1 D2 D3 D4 D5 D6 D7 D8 Stop t csb t sbc CTS Note: Baud rates (program m ed through register SE0) are as follows: 300,1200, 2400, 9600, 19200, 230400, 245760, and 307200 Hz. Figure 2. Asynchronous UART Serial Interface Timing Diagram Rev. 1.3 9 R8 R7 R1 5 R1 6 R1 9 C3 C30 + R13 C14 R1 7 10 Refer to AN48 for Layout Guidelines Please submit layout to Silicon Labs for review prior to PCB fabrication. Q4 Q1 R5 C13 R24 C12 + U2 C1 R27 R28 + VCC Decoupling cap for U1 VD C10 Si2400 C27 C26 Y1 2 1 GPIO3/ESC GPIO2/CD_ GPIO1/EOFR U1 CLKOUT Q2 C5 R6 R1 1 R12 Z1 C20 R2 C6 C16 D4 Z5 C22 R18 RXD TXD CTS_ RESET_ 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 TST A/QE2 TX/FI LT 2 TSTB/DCT NC/FI LT IGND RX C1B REXT RNG1 DCT/REXT2 RNG2 NC/REF QB NC/VREG2 9 QE VREG Si3015 16 15 14 13 12 11 10 XT ALI XT ALO CLKOUT VD RXD TXD CTS RESET GPIO1 GPIO2 GPIO3 ISOB GND C1A GPIO4 9 AOUT 16 15 14 13 12 11 10 Si2400 Z4 D3 AOUT GPIO4/ALER T 2. Typical Application Schematic Q3 C9 C4 C8 R10 L2 FB2 RING C39 R32 Rev. 1.3 C19 D2 R26 RV 2 C18 C7 R9 D1 R25 C25 RV 1 C38 R31 TI P L1 FB1 C24 Note 1: R12, R13 and C14 are only require d if complex AC termination is used (ACT bit = 1). Note 2: See "Ringer Impedance" sectio n for optional Czech Republic support. Note 3: See "Billing Tone Immunity" sectio n for optional billing tone filter (Germany , Switzerland, Sout h Africa) . Note 4: See Appendix for applications requiring UL 1950 3rd edition compliance. Note 5: R27, R28, D3, D4, Z4, Z5, RV 2 may be populated for enhanced lightning option. Note 6: L1,L2, C38, C39, R31, R32 are for EN55022/CISPR-22 Conducted Disturbance compliance. Figure 3. Typical Application Circuit Schematic Si2400 3. Bill of Materials Component C1,C41 C3,C13 C5 2 Value 150 pF, 3 kV, X7R,20% 0.22 F, 16 V, X7R, 20% 0.1 F, 50 V, Elec/Tant, 20% 0.1 F, 16 V, X7R, 20% 560 pF, 250 V, X7R, 20% 22 nF, 250 V, X7R, 20% 1.0 F, 16 V, Elec/Tant, 20% 0.68 F, 16 V, X7R/Elec/Tant, 20% 3.9 nF, 16 V, X7R, 20% 0.01 F, 16 V, X7R, 20% 1800 pF, 50 V, X7R, 20% Suppliers Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata, Panasonic Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata, Panasonic Venkel, Panasonic Novacap, Venkel, AUX, Murata, Panasonic Novacap, Venkel, Johanson, Murata Novacap, Venkel, Johanson, Murata Not installed Novacap, Venkel, Johanson, Murata, Panasonic Novacap, Venkel, Johanson, Murata Not Installed Venkel Central Semiconductor Diodes Inc., OnSemiconductor, Fairchild Murata TDK, Murata, Panasonic OnSemiconductor, Fairchild, Zetex OnSemiconductor, Fairchild, Zetex OnSemiconductor, Fairchild C6,C10,C16 C7,C8 C9 C12 C14 2 3 C18,C193 C20 C22 4 1 C24,C25 C30 4 1000 pF, 3 kV, X7R, 10% 33 pF, 16 V, NPO, 5% 10 pF, 16 V, NPO, 10% 47 pF, 16 V, X7R, 10% Dual Diode, 300 V, 225 mA BAV99 Dual Diode, 70 V Ferrite Bead, 600 , 25%, 200 mA 68 H, 120 mA, 4 max, 10% A42, NPN, 300 V A92, PNP, 300 V BCP56, NPN, 60 V, 1/2 W C26,C27 C38,C39 D3,D4 2,5 D1,D26 1 FB1,FB2 L1,L22,5 Q1,Q3 Q2 Q4 Notes: 7 1. The Si2400 design survives up to 3500 V longitudinal surges without R27, R28, D3, D4, Z4, and Z5. Adding the R27, R28, D3, D4, Z4, Z5 enhanced lightning option increases longitudinal surge survival to greater than 6600 V. The isolation capacitors C1, C4, C24, and C25 must also be rated to greater than the surge voltage. Y-class capacitors are recommended for highest surge survival and are required for Norway, Sweden, Denmark, and Finland. 2. For FCC-only designs: C14, C38, C39, R12, R13, R31, and R32 are not required; L1 and L2 may be replaced with a short; R2 may be 5%; with Z1 rated at 18 V, C5 may be rated at 16 V; also see note 9. 3. If the auto answer, ring detect, and caller ID features are not used, R9, R10, C7, C8, C18, and C19 may be removed. In this case, the RNG1 and RNG2 pins of the Si3015 should be connected to the IGND pin. 4. C22 and C30 may provide an additional improvement in emissions/immunity and/or voice performance, depending on design and layout. Population option recommended. See "Emissions/Immunity" on page 78. 5. Compliance with EN55022 and/or CISPR-22 conducted disturbance tests requires L1, L2, C38, C39, R31, R32, and RV2. See also "EN55022 and CISPR-22 Compliance" in Appendix A. 6. Several diode bridge configurations are acceptable (suppliers include General Semi., Diodes Inc.). 7. Q4 may require copper on board to meet 1/2 W power requirement. (Contact manufacturer for details.) 8. When L1 and L2 are used, RV2 must be installed, and D1 and D2 must be 400 V. 9. The R7, R8, R15, and R16, R17, R19 resistors may each be replaced with a single resistor of 1.78 k, 3/4 W, 1%. For FCC-only designs, 1.78 k, 1/16 W, 5% resistors may be used. 10. If the parallel phone detection feature is not used, R25 and R26 may be removed. 11. To ensure compliance with ITU specifications, frequency tolerance must be less than 100 ppm including initial accuracy, 5-year aging, 0 to 70C, and capacitive loading. Rev. 1.3 11 Si2400 Component RV1 RV28 R2 2 Value Sidactor, 275 V, 100 A 270 V, MOV 402 , 1/16 W, 1% 100 k, 1/16 W, 1% 120 k, 1/16 W, 5% 9 Suppliers Teccor, ST Microelectronics, Microsemi, TI Not Installed Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Venkel, Panasonic Silicon Labs Silicon Labs Not Installed Vishay, Motorola, Rohm Vishay, Motorola, Rohm R5 R6 R7,R8,R15,R16,R17,R19 R9,R10 R11 R12 R13 2 2 3 5.36 k, 1/4 W, 1% 56 k, 1/10 W, 5% 9.31 k, 1/16 W, 1% 78.7 , 1/16 W, 1% 215 , 1/16 W, 1% 2.2 k, 1/10 W, 5% 150 , 1/16 W, 5% R18 R24 R25,R26 R31,R32 U1 U2 Y1 11 10 10 M, 1/16 W, 5% 10 , 1/10 W, 5% 470 , 1/16 W, 5% Si2400 Si3015 4.9152 MHz, 20 pF, 50 ppm, 150 ESR Zener Diode, 43 V, 1/2 W Zener Diode, 5.6 V, 1/2 W R27,R281 2,5 Z12 Z4,Z51 Notes: 1. The Si2400 design survives up to 3500 V longitudinal surges without R27, R28, D3, D4, Z4, and Z5. Adding the R27, R28, D3, D4, Z4, Z5 enhanced lightning option increases longitudinal surge survival to greater than 6600 V. The isolation capacitors C1, C4, C24, and C25 must also be rated to greater than the surge voltage. Y-class capacitors are recommended for highest surge survival and are required for Norway, Sweden, Denmark, and Finland. 2. For FCC-only designs: C14, C38, C39, R12, R13, R31, and R32 are not required; L1 and L2 may be replaced with a short; R2 may be 5%; with Z1 rated at 18 V, C5 may be rated at 16 V; also see note 9. 3. If the auto answer, ring detect, and caller ID features are not used, R9, R10, C7, C8, C18, and C19 may be removed. In this case, the RNG1 and RNG2 pins of the Si3015 should be connected to the IGND pin. 4. C22 and C30 may provide an additional improvement in emissions/immunity and/or voice performance, depending on design and layout. Population option recommended. See "Emissions/Immunity" on page 78. 5. Compliance with EN55022 and/or CISPR-22 conducted disturbance tests requires L1, L2, C38, C39, R31, R32, and RV2. See also "EN55022 and CISPR-22 Compliance" in Appendix A. 6. Several diode bridge configurations are acceptable (suppliers include General Semi., Diodes Inc.). 7. Q4 may require copper on board to meet 1/2 W power requirement. (Contact manufacturer for details.) 8. When L1 and L2 are used, RV2 must be installed, and D1 and D2 must be 400 V. 9. The R7, R8, R15, and R16, R17, R19 resistors may each be replaced with a single resistor of 1.78 k, 3/4 W, 1%. For FCC-only designs, 1.78 k, 1/16 W, 5% resistors may be used. 10. If the parallel phone detection feature is not used, R25 and R26 may be removed. 11. To ensure compliance with ITU specifications, frequency tolerance must be less than 100 ppm including initial accuracy, 5-year aging, 0 to 70C, and capacitive loading. 12 Rev. 1.3 Si2400 4. Analog Input/Output Figure 4 illustrates an optional application circuit to support the analog output capability of the Si2400 for voice monitoring purposes. +5V C2 A OUT R3 6 3 2 C6 R1 + - 4 5 U1 C5 C3 C4 Figure 4. Optional Connection to AOUT for a Monitoring Speaker ` Table 9. Component Values--Optional Connection to AOUT Symbol C2, C3, C5 C4 C6 R1 R2 R3 U1 Value 0.1 F, 16 V, 20% 100 F, 16 V, Elec. 20% 820 pF, 16 V, 20% 10 k, 1/10 W, 5% 10 , 1/10 W, 5% 47 k, 1/10 W, 5% LM386 Si2400 Analog Input 0.1 F AIN/GPIO 1 V RMS Figure 5. Analog Input Circuit Rev. 1.3 13 Si2400 5. Functional Description The Si2400 ISOmodem is a complete modem chipset with integrated direct access arrangement (DAA) that provides a programmable line interface to meet global telephone line requirements. Available in two 16-pin small outline packages, this solution includes a DSP data pump, a modem controller, an analog front end (AFE), a DAA, and an audio codec. The modem, which accepts simple modem AT commands, provides connect rates of up to 2400 bps, full-duplex over the Public Switched Telephone Network (PSTN) with V.42 hardware support through HDLC framing. To minimize handshake times, the Si2400 can implement a V.25-based fast connect. The modem also supports the V.23 reversing protocol and standard alarm formats including SIA. The Si2400 ISOmodem provides numerous features for embedded modem applications including caller ID detection and decoding for the US, UK, and Japanese caller ID formats. Both DTMF decoding and generation are provided on chip as well. Call progress is supported both at a high level through echoing result codes and at a low level through user-programmable biquad filters and parameters such as ring period, ring on/off time, and dialing interdigit time. This device is ideal for embedded modem applications due to its small board space, low power consumption, and global compliance. The Si2400 solution integrates a silicon DAA using Silicon Laboratories' proprietary capacitive isolation technology. This highly integrated DAA can be programmed to meet worldwide PTT specifications for ac termination, dc termination, ringer impedance, and ringer threshold. The DAA also can monitor line status for parallel handset detection and for overcurrent conditions. The Si2400 is designed for rapid assimilation into existing modem applications. The device interfaces directly through a UART to a microcontroller. The Si2400URTEVB connects directly to a standard RS-232 interface. This allows for PC evaluation of the modem immediately upon powerup via HyperTerminal or any standard terminal software. The chipset can be fully programmed to meet international telephone line interface requirements with full compliance to FCC, CTR21, JATE, and other countryspecific PTT specifications. In addition, the Si2400 has been designed to meet the most stringent worldwide requirements for out-of-band energy, billing-tone immunity, lightning surges, and safety requirements. The Si2400 solution needs only a few low-cost discrete components to achieve global compliance. See Figure 3 on page 10 for a typical application circuit. Table 10. Selectable Configurations Configuration V.21 V.22 1 Modulation FSK DPSK QAM FSK FSK DPSK DTMF Pulse FSK Carrier Frequency (Hz) 1080/1750 1200/2400 1200/2400 1300/2100 1300/1700 1170/2125 1200/2400 -- -- 1170/2125 Data Rate (bps) 300 1200 2400 1200/75 600/75 300 1200 40 Low 300 half-duplex Standard Compliance Full Full No retrain Full; plus reversing (Europe) Full Full Full Full 300 bps only V.22bis1,2 V.23 V.23 Bell 103 Bell 212A Security SIA--Pulse SIA Format Notes: 1. The V.22 and V.22bis standards refer to V.14 DTE (UART) configurations. The Si2400 does not support V.14 breaks. In order to support overspeeding by the remote modem, the Si2400 DTE speed must be greater than the modem (line) data rate. 2. The Si2400 only adjusts its DCE rate from 2400 bps to 1200 bps if it is connecting to a V.22-only (1200 bps only) modem. Because the V.22bis specification does not outline a fallback procedure, the host should implement a fallback mechanism consisting of hanging up and connecting at a lower baud rate. Retraining to accommodate changes in line conditions which occur during a call must be implemented by terminating the call and redialing. 14 Rev. 1.3 Si2400 5.1. Digital Interface The Si2400 has a universal asynchronous serial interface (UART) compatible with standard microcontroller serial interfaces. After power-up or reset, the speed of the serial (Data Terminal Equipment--DTE) interface is set by default to 2400 bps with the 8-bit, no parity, and one stop bit (8N1) format described below. The PCM codec serial interface is disabled by default and CLKOUT is set to 9.8304 MHz after power-up or reset. The serial interface DTE rate can be modified by writing SE0[2:0] (SD) with the value corresponding to the desired DTE rate. (See Table 11.) This is accomplished with the command ATSE0=xx where xx is the hexadecimal value of the SE0 register. 5.2. Configurations and Data Rates The Si2400 can be configured to any of the Bell and CCITT operation modes in Table 12. The modem, when configured for V.22bis, will connect at 1200 bps if the far end modem is configured for V.22. This device also supports SIA and other protocols for the security industry. Table 10 provides the modulation method, carrier frequencies, data rate, baud rate and notes on standard compliance for each modem configuration of the Si2400. Table 12 shows example register settings (S07) for some of the modem configurations. As shown in Figure 6, 8-bit and 9-bit data modes refer to the DTE format over the UART. Line data formats are configured through registers S07 (MF1) and S15 (MLC). If the number of bits specified by the DTE format differs from the number of bits specified by the DCE (Data Communications Equipment or Line) format, the MSBs will either be dropped or bit-stuffed, as appropriate. For example, if the DTE format is 9 data bits (9N1), and the line data format is 8 data bits (8N1), then the MSB from the DTE will be dropped as the 9-bit word is passed from the DTE side to the DCE (line) side. In this case, the dropped ninth bit can then be used as an escape mechanism. However, if the DTE format is 8N1and the line data format is 9N1, an MSB equal to 0 will be added to the 8-bit word as it is passed from the DTE side to the DCE side. The Si2400 UART does not continuously check for stop bits on the incoming digital data. Therefore, if the TXD pin is not high, the RXD pin may echo meaningless characters to the host UART. This requires the host UART to flush its receiver FIFO upon initialization. Si2400 TXD RXD DTE Interface Data Rate: SE0[2:0] (SD) Data Form at: SE0[3] (ND) Table 11. DTE Rates DTE Rate (bps) 300 1200 2400 9600 19200 228613 245760 307200 SE0[2:0] (SD) 000 001 010 011 100 101 110 111 Immediately after the ATSE0=xx string is sent, the host UART must be reprogrammed to the new DTE rate in order to communicate with the Si2400. The three highest DTE rates (228613, 245760, 307200) are required for transferring PCM data from the host to the Si2400 PCM interface for the transmission of voice over the phone line or through the voice codec. Si3015 RJ11 Table 12. Modem Configuration Examples (S07[7] (HDEN) = 0, S07[6] (BD) = 0) Modem Protocol V.22bis V.22 V.21 Bell 212A Bell 103 V.23 (1200 tx, 75 rx) V.23 (75 tx, 1200 rx) V.23 (600 tx, 75 rx) V.23 (75 tx, 600 rx) Register S07 Values 0x06 0x02 0x03 0x00 0x01 0x16 0x24 0x12 0x20 DCE (Line) Interface Data Rate: S07 (MF1) Data Form at: S15 (MLC) Figure 6. Link and Line Data Formats 5.2.1. Command/Data Mode Upon reset, the modem will be in command mode and will accept AT-style commands. An outgoing modem call can be made using the "ATDT#" (tone dial) or "ATDP#" (pulse dial) command after the device is configured. If the handshake is successful, the modem will respond with the "c", "d", or "v" string and enter data mode. (The byte following the "c", "d", or "v" will be the first data byte.) At this point, AT-style commands are not accepted. There are three methods which may be used to return the Si2400 to command mode: Rev. 1.3 15 Si2400 Use the ESC pin--To program the GPIO3 pin to function as an ESCAPE input, set GPIO3 SE2[5:4] = 11b. In this setting, a positive edge detected on this pin will return the modem to command mode. The "ATO" string can be used to reenter data mode. Use 9-bit data mode--If 9-bit data format with escape is programmed, a 1 detected on bit 9 will return the modem to command mode. (See Figure 2 on page 9.) This is enabled by setting SE0[3] (ND) = 1b and S15[0] (NBE) = 1b. The ATO string can be used to reenter data mode. Ninth bit escape does not work in the security modes. Use TIES--The time independent escape sequence is a sequence of three escape characters ("+" characters by default). Once these characters have been recognized, the modem enters the Command state without sending a confirming result code to the terminal. The modem then starts an internal prompt delay timer. From that point on if an AT Note: TIES is not the recommended escape solution for the most robust designs. Any data string containing the sequence "+++AT SE0[2:0] (SD) setting and terminates with a stop bit. Data from the host for transmission to the remote modem is shifted to the Si2400 on TXD, beginning with a start bit, LSB first at the DTE rate determined by the SE0[2:0] setting and terminates with a stop bit. After the middle of the stop bit time the Si2400 will begin looking for a logic 1 to logic 0 transition signaling the start of the next character on TXD to be sent to the line (remote modem). 5.2.3. 9-Bit Data Mode (9N1) The 9-bit data mode is set by SE0[3] (ND) = 1b. It is asynchronous, full duplex, and uses a total of 11 bits including a start bit (logic 0), 9 data bits, and a stop bit (logic 1). Data received from the line (remote modem) is transferred from the Si2400 to the host on the RXD pin. Data transfer to the host begins when the Si2400 asserts a logic 0 start bit on RXD. Data is shifted out of the Si2400 LSB first at the DTE rate determined by the SE0[2:0] (SD) setting and terminates with a stop bit. Data from the host for transmission to the line (remote modem) is shifted to the Si2400 on TXD, beginning with a start bit, LSB first at the DTE rate determined by the S-Register SE0[2:0] (SD) setting and terminates with a stop bit. After the middle of the stop bit time the Si2400 will begin looking for a logic 1 to logic 0 transition signaling the start of the next character on TXD to be sent to the line (remote modem). The ninth data bit may be used to indicate an escape by setting S15[0] (NBE) = 1b. In this mode, the ninth data bit will normally be set to 0 when the modem is online. When the ninth data bit is set to 1, the modem will go offline into Command mode and the next frame will be interpreted as an AT command. Data mode can be reentered using the ATO command. 5.2.4. Flow Control No flow control is needed if the DTE rate and DCE rate are the same. If the serial link (DTE) data rate is set higher than the line (DCE) rate of the modem, flow control is required to prevent loss of data to the transmitter. To control data flow, the clear-to-send (CTS) pin is used. As shown in Figure 2 on page 9, the CTS pin will normally be high, and will be low whenever the modem is able to accept new data. The CTS pin will go high again as soon as a start bit is detected on the TXD pin and will remain high until the modem is ready to accept another character. Whether using an escape method or not, when the carrier is lost, the modem will automatically return to command mode and report "N". 5.2.2. 8-Bit Data Mode (8N1) The 8-bit data mode is the default mode after power-up or a reset and is set by SE0[3] (ND) = 0b. It is asynchronous, full duplex, and uses a total of 10 bits including a start bit (logic 0), 8 data bits, and a stop bit (logic 1). Data received from the remote modem is transferred from the Si2400 to the host on the RXD pin. Data transfer to the host begins when the Si2400 asserts a logic 0 start bit on RXD. Data is shifted out of the Si2400 LSB first at the DTE rate determined by the 16 Rev. 1.3 Si2400 5.3. Low Power Modes The Si2400 has three low power modes. These are described below: DSP Powerdown. The DSP processor can be powered down by setting register SEB[3] (PDDE) = 1b. In this mode, the serial interface still functions and the modem will detect ringing and intrusion. However, no modem modes or tone detection features will function. Wake-Up-On-Ring. By issuing the ATz command, the Si2400 goes into a low power mode where both the microcontroller and DSP are powered down. Only an incoming ring or a total reset will power up the chip again. Return from wake-on-ring will trigger the ALERT pin if S62[4] (WOR) = 1b (WOR = 0b by Register Country Australia Brazil 2 1 default). Total Powerdown. Setting SF1[5] = 1b and SF1[6] = 1b will place the Si2400 into a total powerdown mode. All logic is powered down, including the crystal oscillator and clock-out pin. Only a hardware reset can restart the Si2400. 5.4. Global DAA Operation The Si2400 chipset contains an integrated silicon direct access arrangement (silicon DAA) that provides a programmable line interface to meet international telephone line requirements. Table 13 gives the DAA register settings required to meet various country PTT standards. A detailed description of the registers in Table 13 can be found in "Appendix A--DAA Operation" on page 78. Table 13. Country-Specific Register Settings SF5 OHS 1 0 0 0 0 0 0 0 0 1 SF7 RZ 0 0 0 0 0 0 0 0 0 0 1 1 1 RT 0 0 0 0 0 0 0 0 0 0 1 0 0 LIM 0 0 1 0 0 1 0 0 1 0 0 0 0 VOL 0 0 0 0 0 0 0 0 0 0 0 0 0 SF6 FLVM 0 0 0 0 0 0 0 0 0 1 0 0 0 S62 LLC 0 0 1 0 0 0 0 0 0 0 0 0 0 ACT 1 0 1 1 0 1 0 1 1 0 0 0 0 DCT 01 01 10 10 10 11 01 10 11 01 10 10 01 CTR211, 3, 4 Czech Republic FCC 1, 5 Latvia Malaysia1,6 New Zealand Nigeria Philippines Poland7, Slovenia South Africa7 South Korea 7 0 0 1 0 Note: 1. See "DC Termination" on page 79 for more information. 2. The following countries require the same settings as Brazil: Armenia, China, Egypt, Georgia, Japan, Jordan, Kazakhstan, Kyrgyzstan, Malaysia, Muldova, Oman, Pakistan, Qatar, Russia, Syria, Taiwan, Thailand, Ukraine. 3. The following countries require the same settings as CTR21: Austria, Bahrain, Belgium, Bulgaria, Croatia, Cyprus, Denmark, Estonia, European Union, Finland, France, Germany, Greece, Guadeloupe, Iceland, Ireland, Israel, Italy, Lebanon, Liechtenstein, Luxembourg, Malta, Martinique, Morocco, Netherlands, Norway, Polynesia (French), Portugal, Reunion, Spain, Sweden, Switzerland, Turkey, and the United Kingdom. 4. When changing into or out of CTR21 Mode, LLC should be written first. SDF must be enabled (i.e., DGSR 0) and SFS should be reprogrammed before each call. 5. The following countries require the same settings as FCC: Argentina, Brunei, Canada, Chile, Columbia, Dubai, Equador, El Salvador, Guam, Hong Kong, Hungary, India, Indonesia, Kuwait, Macao, Mexico, Peru, Puerto Rico, Romania, Saudi Arabia, Singapore, Slovakia, Tunisia, UAE, USA, Venezuela, Yemen. 6. Supported for loop current 20 mA. 7. SF5[1] (RZ) should only be set for Poland, South Africa and South Korea if the ringer impedance network (C15, R14, Z2, Z3) is not populated. Rev. 1.3 17 Si2400 5.5. Parallel Phone Detection The Si2400 has the ability to detect a phone or other device that is off hook on a shared line. This enables the ISOmodem to avoid interrupting a call in progress on a shared line and to intelligently handle an interruption by another device when the Si2400 is using the line. An automatic algorithm to detect parallel phone intrusion (defined as an off-hook parallel handset) is provided by default. 5.5.1. On-Hook Intrusion Detection To implement intrusion detection, the Si2400 uses loop voltage sense register SDB (LVCS). When on hook, LVCS monitors the line voltage. (When off-hook, it measures line current.) LVCS has a full scale of 87 V with an LSB of 2.75 V. The first code (0 1) is skewed such that a 0 indicates that the line voltage is < 3.0 V. The voltage accuracy of LVCS is 20%. The user can read these bits directly when on hook through register SDB (LVCS). The automatic on-hook detector algorithm can be tripped by either an absolute level or by a voltage differential by selecting S13[3] (ONHD) = 0b for absolute or S13[3] (ONHD) = 1b for differential. If the absolute detector is chosen, the Si2400 algorithm will detect an intrusion if LVCS is less than the value stored in on-hook intrusion threshold, S11[4:0] (AVL). In other words, an intrusion has occurred if LVCS < AVL. AVL defaults to 1000b, or 25 V on powerup. The absolute detector is the correct method to use for most countries and should also be used to detect the presence (or absence) of a line connection. Under the condition of a very short line and a currentlimiting telephone off hook, the off-hook line voltage can be as high as 40 V. The minimum on-hook voltage may not be much greater. This condition can occur on phone lines with current-limiting specifications such as France. For these lines, a differential detector is more appropriate. The differential detector method checks line status every 26.66 ms. The detector compares (LVCS (t - 0.02666) - LVCS (t)) to the differential threshold level set in register S11[7:5] (DVL). The default for DVL is 0x02 (5.5 V). If the threshold is exceeded (LVCS (t - 0.02666) - LVCS (t) > DVL), an intrusion is detected. If (LVCS (t) - LVCS (t - 0.02666) > DVL), then the intrusion is said to have terminated. 30 25 20 LVC S BITS 15 10 5 0 036 9 12 15 18 21 24 28 30 33 36 39 42 45 47 51 54 57 60 63 66 69 72 75 78 81 84 87 Loop Voltage (V) 100 Figure 7. Loop Voltage--LVCS Transfer Function 18 Rev. 1.3 Si2400 5.5.2. Reporting of an On-Hook Intrusion The reporting of an on-hook intrusion is the same whether or not the differential or absolute algorithm is chosen. An "i" result code is sent when an intrusion is detected. Conversely an "I" result code is sent when an intrusion has terminated. S14[1] (IND) indicates the current intrusion status and is set for as long as an intrusion is detected. In addition, if the LVCS returns a value of zero, an "l" result code is sent to the host. If the LVCS becomes non-zero after having gone to zero, an "L" result code is sent to the host. S14[2] (NLD) indicates the current line voltage status and is set for as long as the LVCS is zero. It is possible to suppress the result codes by setting S14[7] MRCD = 1b and selectively re-enabling desired result codes using the S62 register. Suppressing result codes in this fashion does not affect the setting of the NLD and IND bits of the S14 register. Suppressing the result codes is the best approach if polling the S14 register to monitor the intrusion status is preferred. It is also possible to suppress the result codes by setting S33[6] (DON). However, this approach will stop the updating of the S14 register, rendering the on-hook intrusion algorithm completely disabled. This approach may be used if the host checks LVCS directly prior to going off-hook. 5.5.3. Off-Hook Intrusion Detection When the Si2400 is off-hook, it can detect another phone going off-hook by monitoring the dc loop current. The loop current sense transfer function is shown in Figure 8 with the upper curve representing CTR21 (current limiting) operation and the lower curve representing all other modes. The overload points indicate excessive current draw. The user can read these bits directly through SDB (LVCS). Note that as in the line voltage sense, there is hysteresis between codes (0.375 mA for CTR21 mode and 0.75 mA for the alternate mode). The off-hook intrusion algorithm does not begin to operate immediately after going off-hook. This is to avoid triggering an off-hook intrusion interrupt due to offhook transients. The time between going off-hook and enabling the intrusion algorithm defaults to 1 second and may be set via S82[7:4] (IST). Once the intrusion settling time (IST) has elapsed, the Si2400 executes one of the three off-hook intrusion algorithms, depending on the settings of SDF[6:0] (DSGR) and S13[4] (OFHD). See Table 14. Table 14. Off-Hook Intrusion Algorithms Algorithm Differential #1 Differential #2 Absolute OFHD 1 1 0 SDF 0 0 x 5.5.4. Differential Algorithm #1 (default) If (LVCS (t - 800 ms) - LVCS (t)) > S12[7:5] (DCL), then an intrusion is deemed to have taken place. If (LVCS (t) - LVCS (t - 800 ms)) > DCL, then the intrusion is deemed to have completed. Default DCL is 2. This comparison occurs every 200 ms. Overload 30 25 20 LVCS BITS 15 CTR21 10 5 0 0 3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60 63 66 69 72 75 78 81 84 87 90 93 Loop Current (mA) 140 Figure 8. Loop Current--LVCS Transfer Function Rev. 1.3 19 Si2400 5.5.5. Differential Algorithm #2 This differential algorithm has features added to Differential Algorithm #1. The additional features are as follows: Programmable deglitch filter to minimize false intrusions Ability to preset initial LVCS reference prior to going off-hook Optional time window where intrusions are blocked and ignored 5.5.6. Deglitch Filter To avoid triggering an off-hook intrusion interrupt due to a transient or glitch on the telephone line, a deglitch filter is inserted before the off-hook intrusion algorithm. The sample rate of the deglitcher is set by SDF[6:0] (DGSR). (If DGSR = 0, the Differential Algorithm #1 is implemented.) Before a sample is passed to the off-hook intrusion algorithm, it must be confirmed by a subsequent sample of the same value. Otherwise, it is not submitted to the off-hook algorithm. In order to filter out glitches of up to 1 second in duration, for example, DGSR should be set to 1 second (SDF[6:0] = 011001b). In this example, an intrusion event that lasts for more than two seconds is guaranteed to be treated as a real intrusion. Intrusion events between one second and two seconds in duration may or may not be treated as an intrusion. The recommended setting for DGSR is one second, which should work for most applications. Once a sample has been deemed valid by the deglitch filter, the off-hook algorithm operates as follows: If (LVCS (t - 80 ms DGSR) - LVCS (t)) > DCL, then an intrusion is deemed to have taken place. Default DCL is 2. This comparison occurs every 40 ms DGSR. Because the compared value is continually updated, the off-hook intrusion algorithm automatically adjusts to account for drift in line resistance. 5.5.7. LVCS Initialization If an intrusion begins within the time window defined by S82[7:4] (IST), it is possible for an intrusion to go unreported because the initial LVCS used as the reference is sampled after the intrusion has begun. S12[4:0] (ACL) is used to avoid this problem. Prior to going off-hook, the host can set the ACL register to a known value of LVCS with the Si2400 off-hook and all parallel phones or other devices on-hook. If this value is not known, such as on the first off-hook event using this specific phone line, ACL should be set to 0, indicating no known LVCS reference. Once the Si2400 goes back on-hook, it automatically writes the value of the last known LVCS sample prior to 20 an intrusion, if any, into ACL. Therefore, ACL may be used for the next off-hook event even if the current offhook sample contains an intrusion. Except for the first initialization, no host intervention is necessary. The Si2400 clears ACL automatically under a hardware reset. Additionally, ACL is cleared if the modem is onhook, and the phone line is disconnected and then reconnected once again. If the host hardware resets the Si2400 between off-hook events, the host may choose to store the ACL value prior to reset, and then restore this value to ACL prior to the next off-hook event. 5.5.8. Intrusion Blocking Differential Algorithm #2 may be disabled for a period of time after dialing begins. This can avoid triggering an off-hook intrusion interrupt due to pulse dialing or line transients from central office switching. The method to block the intrusion algorithm is set via S82[1:0] (IB). If IB = 10b is chosen, S29 (IS) can be used to set this blocking to an absolute time. In order to detect if an intrusion does occur during blocking and is sustained until after the blocking, the Si2400 will measure the difference in LVCS between the sample before blocking and the sample after blocking. 5.5.9. Absolute Algorithm If the absolute detector is chosen (S13[4] [OFHD] = 0b), the Si2400 will detect an intrusion under the condition that LVCS is less than the off-hook intrusion threshold, S12[4:0] (ACL). In other words, it is determined that an intrusion has occurred if LVCS < ACL. ACL defaults to 0 (12 mA) on powerup. Because the loop current can vary from 20 mA to 100 mA, depending on the line, a factory preset threshold is not useful. To use this absolute mode, the host must measure the line current and set the threshold accordingly. A measurement of the loop current is accomplished by going off-hook (issuing the "ATDT;" command), reading LVCS after 800 ms, and going back on hook using the "ATH" command. This measured value of LVCS should be used to determine the threshold register ACL. If this method is used, the loop current should be measured on a periodic basis to account for drift in line resistance. 5.5.10. Reporting Off-Hook Intrusions The primary method of reporting an off-hook intrusion event to the host is through the use of the ALERT pin. The ALERT function is assigned to GPIO4 by setting SE2[7:6] (GPIO4) = 11b. In general, "i" and "I" result codes are sent when the modem detects an intrusion. However, it is important to note that these result codes are not always reported. When the modem is in the data mode, the "i" and "I" Rev. 1.3 Si2400 result codes are suppressed, and the ALERT pin is the only method of reporting an intrusion to the host. The "i" and "I" result codes may be sent to the host under the following conditions: 1. If the modem is in the process of establishing a connection using the "ATDT# 5.6. Loop Current Detection In addition to monitoring parallel phone intrusion, it is possible to monitor the loss of loop current. This feature can be enabled by setting SE82[3] (LCLD) = 1. This feature is disabled by default. If the loop current is too low for normal DAA operation, the "l" result code is sent, and S14[2] (NLD) is set. Once the loop current returns to a normal current state, the "L" result code is sent and S14[2] (NLD) is cleared. The ALERT pin is also asserted if enabled. The "L" and "l" result codes are not always sent. The principles governing the reporting of the "i" and "I" result codes apply to the "L" and "l" result codes. The status of the S14 register is unchanged for 800 msec after an off-hook to on-hook event. This delay preserves the S14 register contents at the time the ALERT is asserted. Once the ALERT pin is asserted as a consequence of an intrusion, it is the responsibility of the host software to negate it by clearing SE3[3] (GPD4) directly. S14[1] (IND) is an indication of the current intrusion status. It is updated whenever the "i" and "I" result codes are sent to the host or when the ALERT pin is asserted. If set, IND indicates that an intrusion event is in progress. In addition, the status of IND persists for 800 msec after an off hook to on-hook event. After 800 msec has elapsed, IND functions as documented for the on-hook intrusion algorithm. This delay preserves the S14 register contents at the time the ALERT is asserted. When using the modem as a standard data modem and the ALERT pin asserts, the host software may need to force the modem back into command mode. In the command mode, the host can determine if the ALERT assertion was caused by an intrusion or a carrier loss by querying the S14 register. If the modem is dialing (after the ATDT string but before the "c", "v", or "d" result codes), sending any character places the modem back into command mode. In the case in which the modem has already connected (in data mode after the "c", "v" or "d" result code has been sent), an escape sequence is required to place the modem in the command mode. The best method of regaining control, without having to know the exact status of the modem, is by issuing an escape sequence (asserting the ESC pin and waiting a short period of time) and sending a carriage return character. The escape sequence takes care of the case in which the modem is in the connected state, and the carriage return character aborts the dialing if the modem is in the process of dialing to get a connection. If the modem is already on-hook and in command mode, the carriage return character and escape sequence are benign events. 5.7. Carrier Detect/Loss The Si2400 can provide the functionality of a loss-ofcarrier pin similar to the CD pin functionality in an RS232 connection. If programmed as an ALERT, GPIO4 will go high in data mode when either parallel phone intrusion or a loss-of-carrier is detected. When used in this manner, the host detects a low-to-high transition on GPIO4 (ALERT), escapes into command mode, and reads S14[1] (IND). If high, IND indicates intrusion. If low, IND indicates loss-of-carrier. A carrier detect function may also be implemented by setting SE2[3:2] (GPIO2) = 01b, SE4[0] (TRSP) =0b, and SOC[7] (CDE) = 1b. If the Si2400 does not reliably detect loss of carrier, use the following AT command string: ATSE8=00SE6=00SE5=25SE8=01SE6=0ASE5=3DSE8=00 This moves the carrier-off level to within 0.5 dB of the carrier-on level. (The default is 2.5 dB.) This reduces the likelihood that the Si2400 will detect its own output as a remote modem carrier. 5.8. Overcurrent Detection The Si2400 will always go off hook with the currentlimiting mode enabled. This allows no possibility of damage for voltages up to about 48 V. However, at higher voltages the 43 V Zener protection device will begin to conduct and could be damaged if the power is applied for too long. The Si2400 will detect the value of the loop current at a programmable time set by S32 (OCDT) after going offhook (default = 20 ms). If the loop current is too high, an "x" will be echoed back to the host to indicate a fault condition. The host may then check S14[3] (OD) to confirm an overcurrent condition. The user can optionally put the Si2400 into a lower drive Rev. 1.3 21 Si2400 mode, which is similar to the current-limiting mode but has reduced hookswitch drive. This feature allows the Si2400 to remain off-hook on a digital line for a longer period of time without damage. If the Si2400 does not detect overcurrent after the time set by S32 (OCDT), the correct line termination is applied. Another option is setting S13[5] (OFHE) = 1b. When this bit is set, the Si3015 is forced to CTR21 termination during the short period of time from the off-hook event until the timeout defined by OCDT. After the OCDT timeout, the desired dc termination is restored. If it is determined that a false overcurrent condition has been detected, the host may choose to set S62[6] (OCR) = 1b to disable the reporting of the "x" result code. decoded caller ID data. The wetting pulse may cause false intrusions to be detected. To prevent this, setting S14[7] (MRCD) = 1b is recommended. 5.9.3. Japan Caller ID Operation After a polarity reversal and the first ring burst are detected, the Si2400 is taken off hook. The Si2400 then looks for mark bits. If three seconds elapse without detecting a mark bit, the Si2400 hangs up and echoes an "H". Otherwise, after 40 1s (marks) have been detected, the Si2400 will search for a start bit, echo an "m" for mark, and begin assembling characters and transmitting them out through the serial port. When the carrier is lost, the Si2400 immediately hangs up and echoes "N". 5.9.4. Force Caller ID Monitor The Si2400 may be used to continuously monitor the phone line for the caller ID mark signals. This can be useful in systems that require detection of caller ID data before the ring signal, voice mail indicator signals, and Type II caller ID monitor support. To force the Si2400 into caller ID monitor mode, set SOC[6:5] (CIDM) = 11b. In addition, the Force Caller ID Monitor feature can require that the caller ID FSK data be preceded by either a DTMF A or D or a channel seizure pattern by setting CIDM appropriately. Note: CIDM should be disabled before going off-hook. 5.9. Caller ID Decoding Operation The Si2400 supports full caller ID detection and decode for US Bellcore, UK, and Japanese standards. To use the caller ID decoding feature, the following set-up is necessary: 1. Set SE0[3] (ND) = 0b (Set modem to 8N1 configuration) 2. Set S13[1] (CIDU) = 1b (Set modem to Bellcore type caller ID) or S13[2] (CIDB) = 1b (Set modem to UK type caller ID) or S13[7] (JID) = 1b (Set modem to Japanese type caller ID) 5.9.1. Bellcore Caller ID Operation The Si2400 will detect the first ring burst signal and echo an "R" to the host. The device will then start searching for the caller ID preamble sequence after the appropriate time-out. When 50 continuous mark bits have been detected, the "m" response will be echoed to indicate that the mark has been detected and that caller ID data will follow. At this point the algorithm will look for the first start bit, assemble the characters and transmit them out of the serial port as they are detected. Finally, the Si2400 will continue detecting ring bursts and echoing "R" for each burst and will automatically answer after the correct number of rings set by S00 (NR). 5.9.2. UK Caller ID Operation When the Si2400 detects a line reversal, it will echo an "f" to the host. It will then start searching for the Idle State Tone Alert Signal. When this signal has been detected, the Si2400 will transmit an "a" to the host. After the Idle State Tone Alert Signal is completed, the Si2400 will apply the wetting pulse for the required 15 ms by quickly going off hook and on hook. From this point on, the algorithm is identical to that of Bellcore in that it will search for the channel seizure signal and the marks before echoing an "m" and will then report the 5.9.5. DTMF Caller ID In order for the Si2400 to detect DTMF-based caller ID, it must be put into the data mode for DTMF detection. This mode behaves similarly to the ATA0 and ATDT!0 modes in that once a command is sent, ATO must be sent to return to the detection state. The following commands place the Si2400 into an on-hook DTMF detection mode: ATS1D=02SF0=02SE8=02SE6=01S83=66O 22 Rev. 1.3 Si2400 5.10. Tone Generation and Tone Detection The Si2400 provides comprehensive and flexible tone generation and detection. This includes all tones needed to establish a circuit connection and to set up and control a communication session. The tone generation furnishes the DTMF tones for PSTN auto dialing and the supervisory tones for call establishment. The tone detection provides support for call progress monitoring. The detector can also be user-programmed to recognize up to four tones and two tone detection bandpass filters. DTMF tones may be detected and generated by using the "ATA0" and "ATDT!0" commands described in the AT command section. A description of the userprogrammable tones can be found in "7.1.DSP Registers" on page 40. The Si2400 DTMF decoder is designed for single loop applications such as local detection of a parallel DTMF device. Applications requiring DTMF detection across two loops such as programming via a remote keypad are not supported. 5.11. PCM Data Mode The Si2400 has the ability to bypass the modem algorithm and send 14-bit PCM data, sampled at 9600 Hz, across the DAA. To use this mode, it is necessary to set the serial link (DTE) rate to at least 228613 bps SE0[2:0] (SD) = 101b, set S13[0] (PCM) = 1b, and set SE1[7:6] (MCKR) = 00b. The data format (Figure 9) requires that the high byte be sent first containing bits D13-D7. The LSB (B0) must equal zero. The low byte must be sent next containing bits D6-D0; the LSB (B0) must equal one. The receive data format is the same. In PCM data mode, the line can be answered or originated using the "ATDT#;" command. (The ";" is used to keep the modem from leaving the command mode.) When PCM data mode is enabled (set and SE4[5:4] (DRT) = 001b S13[0] (PCM) = 1b (default)), data will immediately begin streaming into and out of the serial port at a 9600 Hz 2 word rate. In this mode, the controller will not detect dial tones or other call progress tones. If desired, the user can monitor these tones using manual call progress detection prior to entering the PCM data mode. To exit the PCM data mode, an escape must be performed either by pulsing the ESC pin or by using 9bit data mode and setting the ninth bit. (TIES cannot be used in PCM data mode.) The escape command will disable PCM streaming, and the controller will again accept AT style commands. PCM Receive Tim ing 8-Bit Data RXD Start B0 D7 B1 D8 B2 High-Byte D9 B3 D10 B4 D11 B5 D12 B6 D13 B7 Stop Start B0 D0 B1 D1 B2 Low-Byte D2 B3 D3 B4 D4 B5 D5 B6 D6 B7 Stop PCM Transm it Tim ing 8-Bit Data TXD Start B0 D7 B1 D8 B2 High-Byte D9 B3 D10 B4 D11 B5 D12 B6 D13 B7 Stop Start B0 D0 B1 Low-Byte D1 B2 D2 B3 D3 B4 D4 B5 D5 B6 D6 B7 Stop Note: Baud rates (programmed through register SEO) can be set to the following: 228613, 245760 and 307200. Figure 9. PCM Timing Rev. 1.3 23 Si2400 Data Mode (DRT = 00b) Si2400 DSP TXD DSPOUT Si3015 RJ11 RJ11 A. RXD DSPIN AOUT (Call Progress) AIN Voice Mode (DRT = 01b) Si2400 DSP TXD DSPOUT Si3015 RJ11 RJ11 B. RXD DSPIN AOUT (Voice Out) AIN (Voice In) Loopback Mode (DRT = 10b) Si2400 DSP TXD RXD DSPOUT C. DSPIN AOUT AIN Codec Mode (DRT = 11b) Si2400 DSP Si3015 RJ11 D. TXD RXD DSPOUT DSPIN AOUT (Voice Out) AIN (Voice In) Figure 10. Signal Routing 24 Rev. 1.3 Si2400 5.12. Analog Codec The Si2400 features an on-chip, voice quality codec. The codec consists of a digital to analog converter (DAC) and an analog to digital converter (ADC). The sample rate for the codec is set to 9.6 kHz. When the codec is powered on (SE4[1] [APO] = 1b), the output of the DAC is always present on the Si2400 AOUT pin. When the codec is powered off (APO = 0b), a PWM output is present on the AOUT pin instead. In order to use the ADC, one of the four GPIO pins must be selected as an analog input (AIN) by programming SE2 (GPIO). Figure 10 shows the various signal routing modes for the Si2400 voice codec, which are programmed through register SE4[5:4] (DRT). Figure 10A shows the data routing for data mode. This is the default mode used for modem data formats. In this configuration, AOUT produces a mixed sum of the DSPOUT and DSPIN signals and is typically used for call progress monitoring through an external speaker. The relative levels of the DSPOUT and DSPIN signals that are output on the AOUT pin can be set through SF4[1:0] (ATL) and SF4[3:2] (ARL). Figure 10B shows the format for sending analog voice across the DAA to the PSTN. AIN is routed directly across the DAA to the telephone line. In this configuration, AOUT produces a mixed sum of the DSPOUT and DSPIN signals. The relative levels of the DSPOUT and DSPIN signals that are output on the AOUT pin can be set through registers ATL and ARL. The DSP may process these signals if it is not in PCM data mode. Thus, the DSP may be used in this configuration, for example, to decode DTMF tones. This is the mode used with the "!0" and "A0" commands. Figure 10C shows the loopback format, which can be used for in-circuit testing. Figure 10D shows the codec mode. This format is useful, for example, in voice prompting, speaker phones, or any systems involving digital signal processing. In this mode, DSPOUT is routed to both the AOUT pin and to the telephone line, and AIN is routed directly to DSPIN. In all the DRT formats, the DSP must be in PCM mode in order to pass DSPIN and DSPOUT directly to and from TXD and RXD. 5.13. V.23 Operation/V.23 Reversing The Si2400 supports full V.23 operation including the V.23 reversing procedure. V.23 operation is enabled by setting S07 (MF1) = xx10xx00b or xx01xx10b. If S07[5] (V23R) = 1b, then the Si2400 will transmit data at 75 bps and receive data at either 600 or 1200 bps. If S07[4] (V23T) = 1b, then the Si2400 will receive data at 75 bps and transmit data at either 600 or 1200 bps. S07[2] (BAUD) is the 1200 or 600 bps indicator. BAUD = 1b will enable the 1200/600 V.23 channel to run at 1200 bps while BAUD = 0b will enable 600 bps operation. When a V.23 connection is successfully established, the modem will respond with a "c" character if the connection is made with the modem transmitting at 1200/600 bps and receiving at 75 bps. The modem will respond with a "v" character if a V.23 connection is established with the modem transmitting at 75 bps and receiving at 1200/600 bps. The Si2400 supports the V.23 turnaround procedure. This allows a modem that is transmitting at 75 bps to initiate a "turnaround" procedure so that it can begin transmitting data at 1200/600 bps and receiving data at 75 bps. The modem is defined as being in V.23 master mode if it is transmitting at 75 bps and it is defined as being in slave mode if the modem is transmitting at 1200/600 bps. The following paragraphs give a detailed description of the V.23 turnaround procedure. 5.13.1. Modem in master mode To perform a direct turnaround once a modem connection is established, the master host goes into online-command-mode by sending an escape command (Escape pin activation, TIES, or ninth bit escape) to the master modem. (Note that the host can initiate a turnaround only if the Si2400 is the master.) The host then sends the ATRO command to the Si2400 to initiate a V.23 turnaround and to go back to the online (data) mode. The Si2400 will then change its carrier frequency (from 390 Hz to 1300 Hz), and wait to detect a 390 Hz carrier for 440 ms. If the modem detects more than 40 ms of a 390 Hz carrier in a time window of 440 ms, it will echo the "c" response character. If the modem does not detect more than 40 ms of a 390 Hz carrier in a time window of 440 ms, it will hang up and echo the "N" (no carrier) character as a response Rev. 1.3 25 Si2400 5.13.2. Modem in slave mode Configure GPIO4 as ALERT (S2E[7:6] [GPIO4] = 11b). The Si2400 performs a reverse turnaround when it detects a carrier drop longer than 20 ms. The Si2400 then reverses (it changes its carrier from 1300 Hz to 390 Hz) and waits to detect a 1300 Hz carrier for 220 ms. If the Si2400 detects more than 40 ms of a 1300 Hz carrier in a time window of 220 ms, then it will set the ALERT pin (GPIO4) and the next character echoed by the Si2400 will be a "v". If the Si2400 does not detect more than 40 ms of the 1300 Hz carrier in a time window of 220 ms, then it reverses again and waits to detect a 390 Hz carrier for 220 ms. Then, if the Si2400 detects more than 40 ms of a 390 Hz carrier in a time window of 220 ms, it will set the ALERT pin (GPIO4) and the next character echoed by the Si2400 will be a "c". At this point, if the Si2400 does not detect more than 40 ms of the 390 Hz carrier in a time window of 220 ms, then it will hang up, set the ALERT pin (GPIO4), and the next character echoed by the Si2400 will be an "N" (no carrier). Successful completion of a turnaround procedure in either master or slave will automatically update S07[4] (V23T) and S07[5] (V23R) to indicate the new status of the V.23 connection. In order to avoid using the ALERT pin, the host may also be notified of the ALERT condition by using 9-bit data mode. Setting S15[0] (NBE) = 1b and S0C[3] (9BF) = 0b will configure the ninth bit on the Si2400 TXD path to function exactly as the ALERT pin has been described. command, or the auto-answer mode. (The auto-answer mode is implemented by setting register S00 (NR) to a non-zero value.) When the call is connected, a "c", "d", or a "v" is echoed to the host controller. The host may now send/receive data across the UART using either the 8-Bit Data or 9-Bit Data formats with flow control. At this point, the Si2400 will begin framing data into the HDLC format. On the transmit side, if no data is available from the host, the HDLC flag pattern is sent repeatedly. When data is available, the Si2400 computes the CRC code throughout the frame and the data is sent with the HDLC zero-bit insertion algorithm. HDLC flow control operates in a similar manner to normal asynchronous flow control across the UART and is shown in Figure 11. In order to operate flow control (using the CTS pin to indicate when the Si2400 is ready to accept a character), a DTE rate higher than the line rate should be selected. The method of transmitting HDLC frames is as follows: 1. After the call is connected, the host should begin sending the frame data to the Si2400, using the CTS flow control to ensure data synchronicity. A 1-deep character FIFO is implemented in the Si2400 to ensure that data is always available to transmit. 2. When the frame is complete, the host should simply stop sending data to the Si2400. As shown in Figure 11B, since the Si2400 does not yet recognize the end-of-frame, it will expect an extra byte and assert CTS. If CTS is used to cause a host interrupt, then this final interrupt should be ignored by the host. 3. When the Si2400 is ready to send the next byte, if it has not yet received any data from the host, it will recognize this as an end-of-frame, raise CTS, calculate the final CRC code, transmit the code, and begin transmitting stop flags. 4. After transmitting the first stop flag, the Si2400 will lower CTS indicating that it is ready to receive the next frame from the host. At this point the process repeats as in step 1. 5.14. V.42 HDLC Mode The Si2400 supports V.42 through hardware HDLC framing in all modem data modes. Frame packing and unpacking, including opening and closing flag generation and detection, CRC computation and checking, zero insertion and deletion, and modem data transmission and reception are all performed by the Si2400. V.42 error correction and V.42bis data compression must be performed by the host. The digital link interface in this mode uses the same UART interface (8-Bit Data and 9-Bit Data formats) as in the asynchronous modes and the ninth data bit may be used as an escape by setting S15[0] (NBE) = 1b. When using HDLC in 9-Bit Data mode, if the ninth bit is not used as an escape, it is ignored. To use the HDLC feature on the Si2400, the host must first enable HDLC operation by setting S07[7] (HDEN) = 1b. Next, the host may initiate the call or answer the call using either the "ATDT#", the "ATA" 26 The method of receiving HDLC frames is as follows: 1. After the call is connected, the Si2400 searches for flag data. Then, once the first non-flag word is detected, the CRC is continuously computed, and the data is sent across the UART (8-Bit Data or 9-Bit Data mode) to the host after removing the HDLC zero-bit insertion. The DTE rate of the host must be at least as high as that of data transmission. HDLC mode only works with 8-bit data words; the ninth bit is used only for escape on TXD and End-of-Frame Received (EOFR) on RXD. 2. When the Si2400 detects the stop flag, it will send the last data word in the frame as well as the two CRC bytes and determine if the CRC checksum matches. Thus, the last two bytes are not frame data, but are the CRC bytes, which can be discarded by the host. If the checksum matches, then the Si2400 echoes "G" (good). If the Rev. 1.3 Si2400 checksum does not match, the Si2400 echoes "e" (error). Additionally, if the Si2400 detects an abort (seven or more contiguous ones), then it will echo an "A". When the "G", "e", or "A" (referred to as a frame result word) is sent, the Si2400 raises the EOFR (end of frame receive) pin (see Figure 10B). The GPIO1 pin must be configured as EOFR by setting SE4[3] (GPE) = 1b. In addition to using the EOFR pin to indicate that the byte is a frame result word, if in 9-bit data mode (set S15[0] (NBE) = 1b), the ninth bit will be raised if the byte is a frame result word. To program this mode, set S0C[3] (9BF) = 1b and SE0[3] (ND) = 1b. 3. When the next frame of data is detected, EOFR is lowered and the process repeats at step 1. 5.15. Fast Connect In modem applications that require fast connection times, it is possible to reduce the length of the handshake. If the Si2400 is set up as an answering modem, the answer tone transmitted by the Si2400 may be shortened by setting S1E (TATL) = 0x00 and setting S34 (TASL) to the desired answer tone length. For the most robust operation, it is recommended that the answer tone sent by the answering modem be at least 10 msec (S34 (TASL) = 0x06). If the Si2400 is configured as an originating modem, setting the No Answer Tone bit (S33[1] [NAT] = 1b) forces the Si2400 to recognize a short answer tone, thereby reducing the overall connection sequence. Additional modem handshaking control can be adjusted through the registers shown in Table 15. These registers are most useful if the user has control of both the originating and answer modems. To summarize, the host will begin receiving data asynchronously from the Si2400. When each byte is received, the host should check the EOFR pin (or the ninth bit). If the EOFR pin (or the ninth bit) is low, then the data is valid frame data. If the EOFR pin (or the ninth bit) is high, then the data is a frame result word. Host begins frame N Host finished sending frame N Host begins frame N + 1 TXD Start Frame N (CTS used as normal flow control.) Stop Si2400 detects end of frame N. Si2400 ready for byte 1 of frame N + 1. Start Frame N + 1 Si2400 ready for byte 1 of frame N CTS Note: Figure not to scale. A. Fram e Transm it RXD Start Receive Data Stop Start CRC Byte 1 Stop Start CRC Byte 2 Stop Start Frame Result W ord Stop EO FR (or bit 9) B. Fram e Receive Figure 11. HDLC Timing Rev. 1.3 27 Si2400 Table 15. Handshaking Control Registers Register Name Function Units Default S1E S1F S20 S21 S22 S23 S24 S25 S26 S27 S28 S2A S2F S30 S31 S34 S35 TATL ATTD UNL TSOD TSOL VDDL VDDH SPTL VTSO VTSOL VTSOH RSO FCD FCDH RATL TASL RSOL Transmit Answer Tone Length Answer Tone to Transmit Delay Unscrambled Ones Length--V.22 Transmit Scrambled Ones Delay--V.22 Transmit Scrambled Ones Length--V.22 V.22/22b Data Delay Low V.22/22b Data Delay High S1 Pattern Time Length V.22b V.22b 1200 bps Scrambled Ones Length V.22b 2400 bps Scrambled Ones Length Low V.22b 2400 bps Scrambled Ones Length High Receive Scrambled Ones V.22b Length FSK Connection Delay Low FSK Connection Delay High Receive Answer Tone Length Answer Tone Length (only used in S1E [TATL] = 0x00) Receive V.22 Scrambled Ones Length 1 sec 5/3 msec 5/3 msec 53.3 msec 5/3 msec 5/3 msec (256) 5/3 msec 5/3 msec 53.3 msec 5/3 msec (256) 5/3 msec 5/3 msec 5/3 msec (256) 5/3 msec 5/3 msec 5/3 msec 5/3 msec 0x03 0x2D 0x5D 0x09 0xA2 0xCB 0x08 0x3C 0x0C 0x78 0x08 0xD2 0x3C 0x00 0x3C 0x5A 0xA2 5.16. Clock Generation Subsystem The Si2400 contains an on-chip clock generator. Using a single master clock input, the Si2400 can generate all modem sample rates necessary to support V.22bis, V.22/Bell212A, and V.21/Bell103 standards and a 9.6 kHz rate for audio playback. Either a 4.9152 MHz clock on XTALI or a 4.9152 MHz crystal across XTALI and XTALO form the master clock for the Si2400. This clock source is sent to an internal phase-locked loop (PLL) which generates all necessary internal system clocks. The PLL has a settling time of ~1 ms. Data on RXD should not be sent to the device prior to settling of the PLL. The CLKOUT pin outputs a 78.6432 MHz/(N + 1) clock which may be used to clock a microcontroller or other devices in the system. N may be programmed via SE1[4:0] (CLKD) to any value from 1 to 31. N defaults to 7 on power-up. CLKOUT is disabled by setting N = 0. SE1[7:6] (MCKR) allows the user to control the microcontroller clock rate. On powerup, the Si2400 28 UART DTE rate is set to 2400 bps, given that the clock input is 4.9152 MHz. The MCKR register conserves power via slower clocking of the microcontroller for specific applications where power conservation is required. Table 16 shows the configurations for different values of MCKR. Table 16. MCKR Configurations SE1[7:6] (MCKR) Controller Clock (MHz) Modes 00 01 10 11 9.8304 MHz 4.9152 MHz 2.4576 MHz Reserved All (default) All except V.22bis, PCM Command only Reserved Rev. 1.3 Si2400 6. AT Command Set The controller provides several vital functions including AT command parsing, DAA control, connect sequence control, DCE protocol control, intrusion detection, parallel phone off-hook detection, escape control, caller ID control and formatting, PCM mode control, ring detect, DTMF control, call progress monitoring, and HDLC framing. The controller also writes to the control registers that configure the modem. Virtually all interaction between the host and the modem is done via the controller. The controller uses AT (ATtention) commands and S-Registers to configure and control the modem. The modem has two basic modes of operation, the Command mode and the Data mode. The Si2400 is asynchronous in both the Command mode and the Data mode. The modem is in the Command mode at powerup, after a reset, before a connection is made, after a connection is dropped, and during a connection after successfully "Escaping" from the data mode back to the command mode using one of the methods previously described. The following section describes the AT command set available in the Command mode. The Si2400 supports a subset of the typical modem AT command set since it is intended for use with a dedicated microcontroller instead of general terminal applications. AT commands begin with the letters AT and are followed directly (no space) by the command. (These commands are also case-sensitive.) All AT commands must be entered in upper case including AT except w##, r#, m#, q#, and z (wakeup-on-ring). AT commands can be divided into two groups, control commands and configuration commands. Control commands, such as ATD, cause the modem to perform an action (going off-hook and dialing). The value of this type of command is changed at a particular time to perform a particular action. For example, the command "ATDT1234 6.1. Command Line Execution The characters in a command line are executed one at a time. Unexpected command characters will be ignored, but unexpected data characters may be interpreted incorrectly. After the modem has executed a command line, the result code corresponding to the last command executed is returned to the terminal or host. In addition to the "ATH" and "ATZ" commands, the commands which warrant a response (e.g., "ATSR?" or "ATI") must be the last in the string and followed by a 6.2. < CR > End Of Line Character This character is typed to end a command line. The value of the Table 17. AT Command Set Summary Command Function A DT# DP# E H I M O RO S w## r# m# q# Z z Answer line immediately with modem. Tone dial number. Pulse dial number. Local echo on/off. Hangup/go on line. Chip revision. Speaker control options. Return online. V.23 reverse. Read/write S-Registers. Write S-Register in binary. Read S-Register in binary. Monitor S-Register in binary. Read S-Register in binary. Software reset. Wakeup on ring. 29 Rev. 1.3 Si2400 6.3. AT Command Set Description A Answer The "A" command makes the modem go off hook and respond to an incoming call. This command is to be executed after the Si2400 has indicated a ring has occurred. (The Si2400 will indicate an incoming ring by echoing an "R".) This command is aborted if any other character is transmitted to the Si2400 before the answer process is completed. Auto answer mode is entered by setting S00 (NR) to a non-zero value. NR indicates the number of rings before answering the line. Upon answering, the modem communicates by whatever protocol has been determined via the modem control registers in S07 (MF1). If no transmit carrier signal is received from the calling modem within the time specified in S39 (CDT), the modem hangs up and enters the idle state. D DT# DP# Dial Tone Dial Number. Pulse Dial Number. ATDT; ATH ATDT# The length of the flash is determined by how quickly the commands are entered. No comma is necessary for the second dial because ATS01 sets the number of seconds before dialing. Set S07[6] (BD) for blind dial. 6.3.1. Automatic Tone/Pulse Dialing The Si2400 can be set up to try DTMF dialing and automatically revert to pulse dialing if it determines that the line is not DTMF-capable. This feature is best explained by the following example: If it is desired that the telephone number 12345 be dialed, it is normally accomplished through either the ATDT12345 or the ATDP12345 command. In the force pulse dialing mode of operation, the following string should be issued instead: ATDT1,p12345 If the result code returned is "t,", it indicates that the dialing was accomplished using DTMF dialing. If the result code returned is "tt,", it indicates that the dialing was accomplished using pulse dialing. In the above example, the Si2400 dials the first digit "1" using DTMF dialing. The "," is used to pause in order to ensure that the central office has had time to accept the DTMF digit "1". When the Si2400 processes the "p" command, it attempts to detect a dial tone. If a dial tone is detected, the DTMF digit "1" was not effective, hence the line does not support DTMF dialing. Conversely, if the dial tone is not detected, the DTMF digit "1" was effective, and the line does support DTMF dialing. The character after the "p" may or may not be dialed, depending on whether the DTMF digit "1" was effective or not. If the "1" was effective (DTMF mode), the character after the "p" is skipped. The next DTMF digit to be dialed is "2". Subsequent digits are all DTMF. If the "1" was not effective, the first character after the "p" (the "1") is pulse dialed, and subsequent digits are all pulse dialed. E Command Mode Echo The D commands make the modem dial a telephone call according to the digits and dial modifiers in the dial string following the command. A maximum of 64 digits is allowed. A DT command performs tone dialing, and a DP command performs pulse dialing. The "ATS07=40DT;" command can be used to go off hook without detecting dial tone or dialing. The dial string must contain only the digits "0-9", "*", "#", "A", "B", "C", "D", or the modifiers ";", "/", or ",". Other characters will be interpreted incorrectly. The modifier "," causes a two second delay (added to the spacing value in S04) in dialing. The modifier "/" causes a 125 ms delay (added to the spacing value in S04) in dialing. The modifier ";" returns the device to command mode after dialing and must be the last character. If any character is received by the Si2400 between the ATDT# 30 Tells the Si2400 whether or not to echo characters sent from the terminal. EO Does not echo characters sent from the terminal. E1 Echo characters sent from the terminal. H I Hangup Chip Identification Hang up and go into command mode (go offline). Rev. 1.3 Si2400 This command causes the modem to echo the chip revision for the Si2400 device. 0 = Revision A 1 = Revision B 2 = Revision C, etc. M Speaker On/Off Options examples are given below. 6.4.1. ATSR Commands These options are used to control AOUT for use with a call progress monitor speaker. M0 Speaker always off. M1 Speaker on until carrier established. The modem sets SF4[3:2] (ARL) = 11b and SF4[1:0] (ATL) = 11b after a connection is established. M2 The ATSR commands are generally used to write to or read from S-registers. The address, R, and the value, N, must be written into the AT command as a two character hexadecimal value between 00 and FF. An S-Register is written with the command "ATSR=N". The hexadecimal address and value parameters appearing on the terminal or PC screen are actually transmitted to the modem as the hexadecimal equivalents of each character. Likewise, the value N stored in S-register R is read back to the terminal with the ATSR? command as two hexadecimal characters. For example, read the value of S35 after the Si2400 has been reset. Terminal Entry Sent to Modem Response Display Speaker always on. M3 ATS35? 6.4.2. # Commands 41 32 A2 Speaker on after last digit dialed, off at carrier detect. O Return to Online Mode This command returns the modem to the online mode. It is frequently used after an escape sequence to resume communication with the remote modem. RO Turn-Around This command initiates a V.23 "direct turnaround" sequence and returns online. 6.4. S-Register Control S-registers control Si2400 configuration and provide status information. Therefore, writing to and reading from S-registers is central to the operation of the modem. There are two fundamental methods for writing to and reading from Si2400 S-Registers. The first and most common method uses the ATSR=N and ATSR? commands. These commands are used by communication software packages and are universally supported by modem chips. The second method uses the ATw##, ATr#, ATm#, and ATq# commands and is designed to reduce data flow and streamline performance in embedded systems. When ATSR commands are used, each character of the two character hexadecimal values for both R and N are sent to the AT command parser for decoding and action immediately instead of waiting for a The # commands offer several performance and convenience advantages for embedded applications over the more traditional ATSR-style commands. The # parameter is entered as the ASCII equivalent of a hexadecimal value representing the S-register address or content. This parameter is sent to the modem as the hexadecimal equivalent of the ASCII value. The # commands offer a more rapid method for reading and writing S-Registers since fewer characters are sent to or received from the modem. 6.4.3. w## Write S-Register This command is analogous to the ATSR=N command. From a terminal, the first # following w is the ASCII equivalent of the hexadecimal address of the S-Register and the second # is the ASCII equivalent of the hexadecimal value of the S-Register. For example, write the value 58h to S34. Terminal Entry Sent to Modem Response Display (hex) ATw4X 41 54 77 34 58 -- -- 6.4.4. r# Command Read S-Register This command is analogous to the ATSR? command. From a terminal, the # following r is the ASCII equivalent of the hexadecimal address of the SRegister. The modem will echo the register contents as the ASCII equivalent of the hexadecimal value of the contents. This command executes immediately and does not require a carriage return. Modem result codes Rev. 1.3 31 Si2400 must be disabled by setting S14[7] (MRCD) = 1b when using this command to ensure the host does not confuse a result code with data. w## and r# are not required to be on separate lines (no Sent to Response Display Modem (hex) (hex) 41 54 77 34 58 58 X 72 34 35 38 58 ATS34=58S34 41 54 53 33 34 ? The "Z" command causes a software reset to occur in the device whereby the registers will return to their default power up value with the exception of E0, E2, E4-E7, F8, and F9. These registers are not reset, so the Si2400 will maintain its current DTE settings, GPIO definitions, tone detect and transmit settings, and overload and billing tone detection status. The hardware reset pin, RESET (Si2400, pin 8), is used to reset the Si2400 to factory default settings. If other commands follow on the same line, another AT is needed after the "Z" (e.g., ATZATS07=06 z Wakeup on Ring (lower-case z) The economy of the # commands is clearly evident from this example. One caveat when using the # commands is that the ASCII equivalents of the response can be displayed as special or graphic characters when using a terminal emulator program such as HyperTerminal. However, in an embedded system, it is easy to send non-ASCII characters. 6.4.5. m# Command Monitor S-Register The Si2400 enters a low-power mode wherein the DSP and microcontroller are powered down. The serial interface also stops functioning. In this mode, only the line-side chip (Si3015) and the communication link function. An incoming ring signal or line transient causes the Si2400 to power up and echo an "R". Without a ring signal, the host must perform a hardware reset (Si2400, pin 8) to power up the Si2400. Return from wake-on-ring can also be set to trigger the ALERT pin by setting S62[4] (WOR) = 1b. 6.5. Alarm Industry AT Commands The Si2400 supports a complete set of commands necessary for making connections in security industry systems. The Si2400 is configurable in three modes for these applications. The first mode, DTMF send and receive, is selected with the "!1" command. The second mode uses FSK transmit with a tone acknowledgement and is selected with "!2". Finally, "!7" is selected for the tone-on/tone-off mode. The following are a few general comments about the use of "!" commands. Specific details for each command is given below. The first instance of the "!" must be on the same line as the ATDT or ATDP command. DRT must be set to data mode (SE4[5:4] (DRT) = 0b) before attempting to send tones after a "!" command. The three data-mode escape sequences ("+++", "escape" pin and "ninth-bit") only function in "!2" mode. However, using the "+++" or "ninth-bit" is not recommended because characters could be sent to and misinterpreted by the remote modem. Only the "escape pin" (Si2400, pin 14) is recommended for use in the "!2" mode. The "!1" and "!7" modes have special escape provisions described in their respective sections below. The AT commands for Alarm Industry applications are described in Table 18. This command is similar to the r# command but is repeated at the DTE rate until a new byte is transmitted to the modem. The modem will echo the register contents to the display as the ASCII equivalent of the hexadecimal value of the contents. This command executes immediately and does not require a carriage return. Modem result codes must be disabled by setting S14[7] (MRCD) = 1b when using this command to ensure that the host does not confuse a result code with data. 6.4.6. q# Command Read S-Register with 0x5500 Offset This command is the same as the r# command except that the response from the Si2400 is formatted as the hexadecimal value 0x55aa where aa is the hexadecimal value of the S-register contents. From a terminal, the # following q is the ASCII equivalent of the hexadecimal address of the S-register. This command executes immediately and does not require a carriage return. The 0x5500 offset in the value of the register contents prevents confusion between data and result codes and permits the result codes to remain enabled. 32 Rev. 1.3 Si2400 Table 18. AT Command Set Extensions for Alarm Industry Command Function Command Result ATDT#!0 Dials # Detects DTMF tones in "data mode" Sends DTMF tones for 1234 Detects DTMF tones in "data mode" Terminates call A0 A1 !0 !1 !2 !7 X1 X2 X3 Answer and switch to DTMF monitor mode Answer and switch to "SIA Format" Dial and switch to DTMF monitor mode Dial and switch to DTMF security mode Dial and switch to "SIA Format" Dial and switch to pulse security mode SIA half-duplex mode search SIA half-duplex return online as transmitter SIA half-duplex return online as receiver Example: Dial a number and place the Si2400 in "voice mode." Command Result ATSEf=02 ATSE2=02 ATDT#!0 Powers ADC and DAC Sets GPIO1 as analog input Dials # Modem in "voice mode" Audio placed on Ain (GPIO1) is transmitted and received audio is available on AOUT (see Figure 10). Terminates call Returns Si2400 to "data mode" for next dial command. 6.5.1. A0 Answer and transmit the AIN analog input signal on the telephone line and connect the phone line receive signal to the AOUT pin (see Figure 10B). This mode also monitors for local DTMF received signals and user defined tones. Any received character is echoed. Userdefined tones are echoed as X and Y. Transmission of any data to the Si2400 UART will cause the modem to go into the command mode. The modem can then send DTMF tones via the "ATDT #!0" command (where # represents a DTMF character 0-9, A-D, # or*) or be disconnected with the "ATH" command. The "ATDT #!0" command string does not initiate a new call since the modem is already connected. Notes: 1. DRT must be set to data mode (SE4[5:4](DRT) = 00b) before attempting to send tones after a "A0" command. User defined tones are enabled by setting S14[6] (UDF) = 1b and require DSP low-level control as defined on page 40. The online mode can be resumed by issuing the "ATO" command. (see the "!0" section for more detail). 2. DTMF detection is only intended for local detection of a parallel device. ATH ATSE4=02 DTMF detection is only intended for local detection of a parallel device, not for detection of a remote source over two local loops. "Data mode" (see example above) DTMF detection is reliable on a quiet line without the presence of interfering audio signals or voice. DTMF detection, although possible, in the "voice mode" (see example above) is not recommended and can be unreliable. 6.5.3. !1 6.5.2. !0 Dial number and follow the DTMF security protocol. The format for this command is as follows: ATDT Rev. 1.3 33 After dialing the number, go to DTMF monitor mode with no modem connection. After dialing the !0 mode is the same as the A0 mode described previously. Example: Dial a number and detect DTMF tones in "data mode." Si2400 ! 6.5.4. A1 signaling is at 300 bps half-duplex FSK. The host can send the first SIA block after the "c" is received. Once the block is transmitted, the modem can monitor for the acknowledge tone by completing the following sequence: 1. Place the Si2400 in the command mode by pulsing the ESCAPE pin (Si2400 pin 14). The "+++" and "ninth-bit" escape modes will operate in the "!2" mode but are not recommended because they can send unwanted characters to the remote modem. 2. Issue the "ATX1" command to turn the modem transmitter off and begin monitoring for the acknowledgment tones. 3. Monitor for a positive (negative) acknowledgment "P" ("N") after the tone has been detected for at least 400 msec. 4. The modem, still in command mode, can be placed online as a transmitter by issuing the "ATX2" command or a receiver by issuing the "ATX3" command. If tonal acknowledgement is not used, the host can toggle the ESCAPE pin to place the Si2400 in the command mode and issue an "ATX2" or an "ATX3" command to reverse data direction. This sequence can be repeated for long messages. 6.5.6. !7 The "!7" mode is a field-configurable tone-on/tone-off messaging protocol for the alarm industry. There are many proprietary standards that necessitate a flexible alarm protocol. The "!7" command fills that need with programmable usage and timing. The "!7" mode is entered by issuing the "ATDT Answers a call and follows the "SIA Format" protocol for Alarm System Communications at 300 bps (see !2). 6.5.5. !2 Dial number and follow the "SIA Format" protocol for Alarm System Communications. The modem dials the phone number and echoes "r" (ring), "b" (busy), and "c" (connect) as appropriate. "c" echoes only after the Si2400 detects the Handshake Tone and the speed synchronization signal is sent. The 34 Rev. 1.3 Si2400 answer (e.g. 500 = 01) or Bellcore CID will function normally. Basic Command ATDT Result codes after "c" received , K Message sent--start of intermessage time Kissoff Tone detected in S36[3:2] (IDKT) time window and present for S38[4:2] (HMT) msec Kissoff Tone not detected per above Intermessage timeout defined in S36[3:2] (IDKT) elapsed. A second message received after the "," is sent at this time. Table 19. !7 Parameters S-Register S1F Bits Name Alarm 3 Function Reconfigured from ATTD in !7 mode. 7:5 4:0 S2B S2C S2D S2E S36 KOT IMT DTL DTTO SDL RTCT Alarm 1 Kissoff timeout. Intermessage timing. Reconfigured from DTL in !7 mode to pulse on time (5/3 ms units). Reconfigured from DTTO in !7 mode to pulse off time (5/3 ms units). Reconfigured from SDL in !7 mode to pulse interdigit time (5/3 ms units). Reconfigured from RTLT in !7 mode to handshake end to data TX delay (10 ms units). Reconfigured from SKDTL in !7 mode. 7:0 7:0 7:0 7:0 7:6 5:4 3:2 1:0 S38 POF PON IDKT IT Alarm 2 Pulse off time. Pulse on time. Intermessage delay and Kissoff timeout. Interdigit timing. Only used in !7 mode. 7 6:5 4:2 1:0 S39 7:0 DBD DCF HMT HF CDT Delay before data. Data carrier frequency. Handshake minimum tone. Handshake frequency. Reconfigured from CDT in !7 mode to handshake tone timeout. Rev. 1.3 35 Si2400 6.5.7. Intermessage Timing 6.5.8. Returning to Command Mode Intermessage timing is accomplished in three ways, relative to the end of the previous message ("," result code), relative to the Kissoff Tone ("K" result code) or relative to the Kissoff timeout ("^" result code). If the intermessage timing is relative to the end of the previous message (S36[3:2] [IDKT] = 10b or 11b), the intermessage timer begins with the "," result code. The Si2400 sends an "N" to mark the time in which the intermessage timer has timed out. If another message is received prior to the "N", the Si2400 keeps the message and sends it to the receiver at the time the "N" is sent. If a message is not received within the time frame defined by "," and "N", the Si2400 sends nothing, waits for the next message and transmits the message as soon as the host sends the message. This message may not be accepted by the alarm receiver. If the intermessage timing is relative to the end of the Kissoff Tone, the timing begins when the "K" result code is sent. In the event a kissoff tone was not detected, the intermessage timing begins when the "^" is sent. To return to command mode, the host sends any character except the "~" and "!" characters. The example here uses a !7xxx X1 Search for positive and negative acknowledge tones in SIA half-duplex 300 bps mode. The Si2400 will respond with "P" when a positive acknowledge is detected and "N" when a negative acknowledge is detected. X2 Return to online mode in SIA half-duplex mode as transmitter. X3 Return to online mode in SIA half-duplex mode as receiver. S39 (CDT) Before give up on handshake Handshake Tone S38[4:2] (HMT) m in. f = S38[1:0] (HF) Kissoff Tone f = S38[6:5] (DCF) S36[3:2] (IDKT) = 0Xb Interm essage From end of Kissoff Tone S36[3:2] (IDKT) Before Indicating lack of Kissoff S38[7] (DBD) S38[4:2] (HMT) m in. 1st Digit Last Digit 1st Digit Last Digit 2nd Message S36[3:2] (IDKT) = 1Xb Interm essage from end of previous m essage to start of next m essage S36[1:0] (IT) = 0Xb Interdigit Intradigit Tim ing S36[1:0] (IT) = 1Xb Interdigit Pulse On = S36[5:4] (PON) Pulse Off = S36[7:6] (POF) Pulse freq = S38[6:5] (DCF) Figure 12. !7 Security Timing 36 Rev. 1.3 Si2400 6.6. Modem Result Codes and Call Progress Table 20 shows the modem result codes which can be used in call progress monitoring. All result codes are a single character to speed up communication and ease host processing. 6.6.1. Automatic Call Progress Detection The Si2400 has the ability to detect dial, busy and ringback tones automatically. The following is a description of the algorithms that have been implemented for these three tones. 1. Dial Tone. The dial tone detector looks for a dial tone after going off hook and before dialing is initiated. This can be bypassed by enabling blind dialing (set S07[6] (BD) =1b). After going off hook, the Si2400 waits the number of seconds in S01 (DW) before searching for the dial tone. In order for a dial tone to be detected, it must be present for the length of time programmed in S1C (DTT). Once the dial tone is detected, dialing will commence. If a dial tone is not detected within the time programmed in S02 (CW), the Si2400 will hangup and echo an "N" to the user. 2. Busy / Ringback Tone. After dialing has completed, the Si2400 monitors for Busy/Ringback and modem answer tones. The busy and ringback tone detectors both use the call progress energy detector. The registers that set the cadence for busy and ringback are listed in Table 21. Si2400 register settings for global cadences for busy and ringback tones are listed in Table 22. Table 20. Modem Result Codes Command Function a b c d f H I British Telecom Caller ID Idle Tone Alert Detected Busy Tone Detected Connect Connect 1200 bps (when programmed as V.22bis modem) Hookswitch Flash or Battery Reversal Detected Modem Automatically Hanging Up in Japan Caller ID Mode Intrusion Completed (parallel phone back on hook) Intrusion Detected (parallel phone offhook on the line) Kissoff Tone Detected Contact ID Kissoff Tone too long. Phone Line Detected No Phone Line Detected Caller ID Mark Signal Detected No Carrier Detected No Dial tone (time-out set by CW [S02]) Modem OK Response Incoming Ring Signal Detected Ringback Tone Detected Dial Tone Connect 75 bps TX (V.23 originate only) Overcurrent State Detected After an Off-Hook Event Kissoff tone detection required Dialing Complete Table 21. Busy and Ringback Cadence Registers Register S16 S17 S18 S19 Name BTON BTOF BTOD RTON Function Units Busy tone on time 10 msec Busy tone off time 10 msec Busy tone delta time 10 msec Ringback tone on 53.333 time msec Ringback tone off 53.333 time msec Ringback tone delta 53.333 time msec i K k L l m N n O R r t v x ^ , S1A S1B RTOF RTOD 6.6.2. Manual Call Progress Detection Because other call progress tones beyond those described above may exist, the Si2400 supports manual call progress. This requires the host to read and write the low-level DSP registers and may require realtime control by the host. Manual call progress may be required for detection of application-specific ringback, dial tone, and busy signals. The section on DSP low level control should be read before attempting manual call progress detection. To use this mode, the automatic modem responses should be disabled by setting S14[7] (MRCD) = 1b. The call progress biquad filters can be programmed to have a custom frequency response and detection level (as described in "Low Level DSP Control"). Four dedicated user-defined frequency detectors can Rev. 1.3 37 Si2400 be programmed to search for individual tones. The four detectors have center frequencies which can be set by registers UDFD1-4 (see Table 24). (SE5[6] [TDET] [SE8 = 0x02] Read Only Definition) can be monitored, along with TONE, to detect energy at these userdefined frequencies. The default trip-threshold for UDFD1-4 is -34 dBm but can be modified with the DSP register UDFSL. By issuing the "ATDT;" command, the modem will go off hook and return to command mode. The user can then put the DSP into call progress monitoring by first setting SE8 = 0x02. Next, set SE5 (DSP2) = 0x00 so no tones are transmitted, and set SE6 (DSP3) to the appropriate code, depending on which types of tones are to be detected. Table 22. Si2400 Global Ringer and Busy Tone Cadence Settings Country RTON S19 RTOF S1A RTOD S1B BTON S16 BTOF S17 BTOD S18 Australia Austria Belgium Brazil Bulgaria China Cyprus Czech Republic Denmark Finland France Germany Great Britain Greece Hong Kong, New Zealand Hungary Iceland India Ireland Italy, Netherlands, Norway, Thailand, Switzerland, Israel Japan, Korea Luxembourg Malaysia Malta Mexico Poland Portugal Singapore Spain Sweden Taiwan U.S., Canada (default) 38 0x07 0x12 0x12 0x12 0x12 0x12 0x1C 0x12 0x0E 0x0E 0x1C 0x12 0x07 0x12 0x07 0x17 0x16 0x07 0x07 0x12 0x12 0x12 0x07 0x00 0x12 0x12 0x12 0x07 0x1C 0x12 0x12 0x25 0x03 0x5D 0x38 0x4B 0x4B 0x4B 0x38 0x4B 0x8C 0x5D 0x41 0x4B 0x03 0x4B 0x03 0x46 0x58 0x03 0x03 0x4B 0x25 0x4B 0x03 0x00 0x4B 0x4B 0x5D 0x03 0x38 0x5D 0x25 0x4B Rev. 1.3 0x01 0x0A 0x06 0x08 0x08 0x08 0x06 0x08 0x0F 0x0A 0x07 0x08 0x01 0x08 0x01 0x0F 0x09 0x01 0x01 0x08 0x04 0x08 0x01 0x00 0x08 0x10 0x0A 0x01 0x06 0x0A 0x04 0x08 0x25 0x1E 0x32 0x19 0x14 0x23 0x32 0x18 0x19 0x1E 0x32 0x32 0x25 0x1E 0x32 0x1E 0x19 0x4B 0x32 0x32 0x32 0x30 0x23 0x00 0x19 0x32 0x32 0x4B 0x14 0x19 0x32 0x32 0x25 0x1E 0x32 0x19 0x32 0x23 0x32 0x24 0x19 0x1E 0x32 0x32 0x25 0x1E 0x32 0x1E 0x19 0x4B 0x32 0x32 0x32 0x30 0x41 0x00 0x19 0x32 0x32 0x4B 0x14 0x19 0x32 0x32 0x04 0x03 0x05 0x03 0x05 0x04 0x05 0x0A 0x03 0x03 0x05 0x05 0x04 0x03 0x05 0x03 0x03 0x08 0x05 0x05 0x05 0x05 0x07 0x00 0x03 0x05 0x05 0x08 0x02 0x03 0x05 0x05 Si2400 At this point, users may program their own algorithm to monitor the detected tones. If the host wishes to dial, it should do so by blind dialing, setting the dial timeout S01 (DW) to 0 seconds, and issuing an "ATDT Table 23. DTMF DTMF Code Keyboard Equivalent Contact ID Digit Tones Low High 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 D * # A B C 0 1 2 3 4 5 6 7 8 9 - B C D E F 941 697 697 697 770 770 770 852 852 852 941 941 941 697 770 852 1336 1209 1336 1477 1209 1336 1477 1209 1336 1477 1633 1209 1477 1633 1633 1633 Rev. 1.3 39 Si2400 7. Low Level DSP Control Although not necessary for most applications, the DSP low-level control functions are available for users with very specific applications requiring direct DSP control. with the low bits [7:0] of the DSP register address and SE6 (DADH) is written with the high bits [15:8] of the DSP address. When SE8 = 0x01, SE5 (DDL) is written with the low bits [7:0] of the DSP data word corresponding to the previously written address and SE6 (DDH) is written with the high bits [15:8] of the data word corresponding to the previously written address. Example 1 below illustrates the proper procedure for writing to DSP registers. Example1: The user would like to program call progress filter coefficient A2_k0 (0x15) to be 309 (0x135). Host Command: ATSE8=00SE6=00SE5=15SE8=01SE6=01SE5=35SE8=00 7.1. DSP Registers Several DSP registers are accessible through the Si2400 microcontroller via S-registers SE5, SE6, SE7 and SE8. SE5 and SE6 are used as conduits to write data to specific DSP registers and read status. SE8 defines the function of SE5 and SE6 depending on whether they are being written to or read from. Care must be exercised when writing to DSP registers. DSP registers can only be written while the Si2400 is onhook and in the Command mode. Writing to any register address not listed in Tables 24 and 25 or writing out-ofrange values is likely to cause the DSP to exhibit unpredictable behavior. The DSP register address is 16-bits wide and the DSP data field is 14-bits wide. DSP register addresses and data are written in hexadecimal. To write a value to a DSP register, the register address is written then the data is written. When SE8 = 0x00, SE5(DADL) is written In the command above, ATSE8=00 sets up registers SE5 and SE6 as DSP address registers. SE6=00 sets the high bits of the address, and SE5=15 sets the low bits. SE8=01 sets up registers SE5 and SE6 as DSP data registers for the previously written DSP address (0x15). SE6=01 sets the high 6 bits of the 14-bit data word, and SE5=35 sets the low 8 bits of the 14-bit data word. Table 24. Low-Level DSP Parameters DSP Reg. Addr. Name Description Function Default (dec) 0x0002 0x0003 0x0004 0x0005 0x0006 0x0007 0x0008 0x0009 0x000A 0x000B XMTL DAA modem full scale transmit level, default = -10 dBm DTML DTMF high tone transmit level, default = -5.5 dBm Level = 20log10 (XTML/4096) -10 dBm Level = 20log10 (DTML/4868) -5.5 dBm 4096 4868 3277 91 4096 4987 536 4987 536 2896 DTMT DTMF twist ratio (low/high), default = -2 dBm Level = 20log10 (DTMT/3277) - 2 dB UFRQ User-defined transmit tone frequency. See register SE5 (SE8=0x02 (Write Only)) CPDL Call progress detect level (see Figure 13), default = -43 dBm UDFD1 User-defined frequency detector 1. Center frequency for detector 1. UDFD2 User-defined frequency detector 2. Center frequency for detector 2. UDFD3 User-defined frequency detector 3. Center frequency for detector 3. UDFD4 User-defined frequency detector 4. Center frequency for detector 4. f = (9600/512) UFRQ (Hz) Level = 20log10 (4096/CPDL) -43 dBm UDFD1 = 8192 cos (2 f/9600) UDFD2 = 8192 cos (2 f/9600) UDFD3 = 8192 cos (2 f/9600) UDFD4 = 8192 cos (2 f/9600) TGNL Tone generation level associated with TONC Level = 20log10 (TGNL/2896) - 10 dBm (SE5 (SE8 = 0x02) Write Only Definition), default = -10 dBm Rev. 1.3 40 Si2400 Table 24. Low-Level DSP Parameters (Continued) DSP Reg. Addr. Name Description Function Default (dec) 0x000E 0x0024 0x0025 0x0026 0x0027 UDFSL Sensitivity setting for UDFD1-4 detectors, default = -43 dBm CONL Carrier ON level. Carrier is valid once it reaches this level. COFL Carrier OFF level. Carrier is invalid once it falls below this level. Sensitivity = 10log10(UDFSL/ 4096) - 43 dBm Level = 20log10(2620/CONL) - 43 dBm Level = 20log10(3300/COFL) - 45.5 dBm 4096 2620 3300 67 37 AONL Answer ON level. Answer tone is valid once it Level = 10log10(AONL/107) - 43 dBm reaches this level. AOFL Answer OFF level. Answer tone is invalid once it fall below this level. Level = 10log10(AOFL/58) - 45.5 dBm Table 25 defines the relationship between SE5, SE6, and SE8. Table 25. SE5, SE6, and SE8 Relationship SE8 R/W Name SE6 Description Name SE5 Description 0x00 0x01 0x02 W W R DADH DDH DSP register address bits [15:8] DSP register data bits [15:8] DADL DDL DSP1 DSP register address bits [7:0] DSP register data bits [7:0] 7 = DSP data available. 6 = Tone detected. 5 = Reserved. 4:0 = Tone type. 7 = Reserved. 6:3 = DTMF tone to transmit. 2:0 = Tone type. 0x02 W DSP3 7 = Enable squaring function. 6 = Call progress cascade disable. 5 = Reserved. 4 = User tone 3 and 4 reporting. 3 = User tone 1 and 2 reporting. 2 = V.23 tone reporting. 1 = Answer tone reporting. 0 = DTMF tone reporting. DSP2 Rev. 1.3 41 Si2400 7.2. Call Progress Filters The programmable call progress filter coefficients are located in DSP address locations 0x0010 through 0x0023. There are two independent 4th order filters A and B, each consisting of two biquads, for a total of 20 coefficients. Coefficients are 14 bits (-8192 to 8191) and are interpreted as, for example, b0 = value/4096, thus giving a floating point value of approximately -2.0 to 2.0. Output of each biquad is calculated as w[n] = k0 x[n] + a1 w[n - 1] + a2 w[n - 2] y[n] = w[n] + b1 w[n - 1] + b2 w[n - 2]. The output of the filters is input to an energy detector and then compared to a fixed threshold with hysteresis (DSP register CPDL). Defaults shown are a bandpass filter from 290-630 Hz (-3 dB). These registers are located in the DSP and thus must be written in the same manner described in "DSP Registers". The filters may be configured in either parallel or cascade through SE6[6] (CPCD) with SE8 = 0x02, and the output of filter B may be squared by selecting SE6[7] (CPSQ) = 1b. Figure 13 shows a block diagram of the call progress filter structure. Table 26. Call Progress Filters DSP Register Address Coefficient Default (dec) 0x0010 0x0011 0x0012 0x0013 0x0014 0x0015 0x0016 0x0017 0x0018 0x0019 0x001A 0x001B 0x001C 0x001D 0x001E 0x001F 0x0020 0x0021 0x0022 0x0023 A1_k0 A1_b1 A1_b2 A1_a1 A1_a2 A2_k0 A2_b1 A2_b2 A2_a1 A2_a2 B1_k0 B1_b1 B1_b2 B1_a1 B1_a2 B2_k0 B2_b1 B2_b2 B2_a1 B2_a2 256 -8184 4096 7737 -3801 1236 133 4096 7109 -3565 256 -8184 4096 7737 -3801 1236 133 4096 7109 -3565 0 CPCD 1 Filter Input Filter B Energy Detect 0 1 0 CPCD 1 0 CPSQ y = x2 B A Max (A,B) A Hysteresis B A > B? TDET Filter A Energy Detect 20log 10 (4096/CPDL) -34 dBm Figure 13. Programmable Call Progress Filter Architecture 42 Rev. 1.3 Si2400 8. S Registers Any register not documented here is reserved and should not be written. Bold selection in bit-mapped registers indicate default values. Table 27. S-Register Summary "S" Register Register Address (hex) Name Function Reset S00 S01 S02 S03 S04 S05 S06 S07 S08 S09 S0A S0B S0C S0D S0E S0F S10 S11 S12 S13 S14 S15 S16 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 NR DW CW CLW TD OFFPD ONPD MF1 MNRP MXRP ROT MNRO MF2 RPE DIT TEC TDT ONHI OFHI MF3 MF4 MLC BTON Number of rings before answer; 0 suppresses auto answer. Number of seconds modem waits before dialing after going off-hook (maximum of 109 seconds). Number of seconds modem waits for a dial tone before hang-up added to time specified by DW (maximum of 109 seconds). Duration that the modem waits (53.33 ms units) after loss of carrier before hanging up. Both duration and spacing (5/3 ms units) of DTMF dialed tones. Duration of off-hook time (5/3 ms units) for pulse dialing. Duration of on-hook time (5/3 ms units) for pulse dialing. This is a bit mapped register. 1 2 2 0x00 0x03 0x14 0x0E 0x30 0x18 0x24 0x01 0x0A 0x28 0x4B Minimum ring period (5/3 ms units). 2 Maximum ring period (5/3 ms units). Ringer off time (53.333 ms units). 1 Minimum ringer off time (10 ms units). This is a bit mapped register. 2 0x08 0x00 2 Ringer off time allowed error (53.333 ms units). 0x16 0x46 0x2B 0x07 0x48 0x40 0x10 0x00 0x84 0x32 Pulse dialing Interdigit time (10 ms units added to a minimum time of 64 ms). TIES escape character. Default = +. TIES delay time (256 5/3 ms units). This is a bit mapped register. This is a bit mapped register. 1 1 1 1 1 This is a bit mapped register. This is a bit mapped register. This is a bit mapped register. Busy tone on. Time that the busy tone must be on (10 ms units) for busy tone detector. Notes: 1. These registers are explained in detail in the following section. 2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT, and REP. Rev. 1.3 43 Si2400 Table 27. S-Register Summary (Continued) "S" Register Register Address (hex) Name Function Reset S17 S18 0x17 0x18 BTOF BTOD Busy tone off. Time that the busy tone must be off (10 ms units) for busy tone detector. Busy tone delta. Detector Time Delta (10 ms). A busy tone is detected to be valid if (BTON - BTOD < on time < BTON + BTOD) and (BTOF - BTOD < off time < BTOF + BTOD). Ringback tone on. Time that the ringback tone must be on (53.333 ms units) for ringback tone detector. Ringback tone off. Time that the ringback tone must be off (53.333 ms units) for ringback tone detector. Detector time delta (53.333 ms units). A ringback tone is determined to be valid if (RTON - RTOD < on time < RTON + RTOD) and (RTOF - RTOD < off time < RTOF + RTOD). Dial tone detect time. The time that the dial tone must be valid before being detected (10 ms units). 0x32 0x0F S19 S1A S1B 0x19 0x1A 0x1B RTON RTOF RTOD 0x26 0x4B 0x07 S1C 0x1C DTT 0x0A S1D S1E S1F 0x1D 0x1E 0x1F DTMFD DTMF detect time. The time that a DTMF tone must be valid before being detected (10 ms units). TATL ATTD Transmit answer tone length. Answer tone length in seconds when answering a call (1 second units). Answer tone to transmit delay. Delay between answer tone end and transmit data start (5/3 ms units). In the !7 mode, this is a bitmapped register. Unscrambled ones length. Minimum length of time required for detection of unscrambled binary ones during V.22 handshaking by a calling modem (5/3 ms units). Transmit scrambled ones delay. Time between unscrambled binary one detection and scrambled binary one transmission by a call mode V.22 modem (53.3 ms units). Transmit scrambled ones length. Length of time scrambled ones are sent by a call mode V.22 modem (5/3 ms units). V.22 data delay low. Delay between handshake complete and data connection for a V.22 call mode modem (5/3 ms units added to the time specified by VDDH). V.22 data delay high. Delay between handshake complete and data connection for a V.22 call mode modem (256 5/3 ms units added to the time specified by VDDL). S1 pattern time length. Amount of time the unscrambled S1 pattern is sent by a call mode V.22bis modem (5/3 ms units). 0x03 0x03 0x2D S20 0x20 UNL 0x5D S21 0x21 TSOD 0x09 S22 S23 0x22 0x23 TSOL VDDL 0xA2 0xCB S24 0x24 VDDH 0x08 S25 0x25 SPTL 0x3C Notes: 1. These registers are explained in detail in the following section. 2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT, and REP. 44 Rev. 1.3 Si2400 Table 27. S-Register Summary (Continued) "S" Register Register Address (hex) Name Function Reset S26 0x26 VTSO V.22bis 1200 bps scrambled ones length. Minimum length of time for transmission of 1200 bps scrambled binary ones by a call mode V.22bis modem after the end of pattern S1 detection (53.3 ms). V.22bis 2400 bps scrambled ones length low. Minimum length of time for transmission of 2400 bps scrambled binary ones by a call mode V.22bis modem (5/3 ms units). V.22bis 2400 bps scrambled ones length high. Minimum length of time for transmission of 2400 bps scrambled binary ones by a call mode V.22bis modem (256 5/3 ms units added to the time specified by VTSOL). Intrusion suspend. When S82[2:1] (IB) = 10b, this register sets the length of time from when dialing begins that the off-hook intrusion algorithm is blocked (suspended) (500 ms units). Receive scrambled ones V.22bis (2400 bps) length. Minimum length of time required for detection of scrambled binary ones during V.22bis handshaking by the answering modem after S1 pattern conclusion (5/3 ms units). V.23 direct turnaround carrier length. Minimum length of time that a master mode V.23 modem must detect carrier when searching for a direct turnaround sequence (5/3 ms units). In the !7 alarm mode, this register functions as pulse on time. V.23 direct turnaround timeout. Length of time that the modem searches for a direct turnaround carrier (5/3 ms units added to a minimum time of 426.66 ms). In the !7 alarm mode, this register functions as pulse off time. V.23 slave carrier detect loss. Minimum length of time that a slave mode V.23 modem must lose carrier before searching for a reverse turnaround sequence (5/3 ms units). In the !7 alarm mode, this register functions as pulse interdigit time (10 ms units). V.23 reverse turnaround carrier timeout. Amount of time a slave mode V.23 modem will search for carriers during potential reverse turnaround sequences (5/3 ms units). In the !7 alarm mode, this register functions as Handshake End to TX Data delay (10 ms units). FSK connection delay low. Amount of time delay added between end of answer tone handshake and actual modem connection for FSK modem connections (5/3 ms units). 0x0C S27 0x27 VTSOL 0x78 S28 0x28 VTSOH 0x08 S29 0x29 IS 0x00 S2A 0x2A RSO 0xD2 S2B 0x2B DTL 0x18 S2C 0x2C DTTO 0x08 S2D 0x2D SDL 0x0C S2E 0x2E RTCT 0x84 S2F 0x2F FCD 0x3C Notes: 1. These registers are explained in detail in the following section. 2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT, and REP. Rev. 1.3 45 Si2400 Table 27. S-Register Summary (Continued) "S" Register Register Address (hex) Name Function Reset S30 0x30 FCDH FSK connection delay high. Amount of time delay added between end of answer tone handshake and actual modem connection for FSK modem connections (256 5/3 ms units). Receive answer tone length. Minimum length of time required for detection of a CCITT answer tone (5/3 ms units). The time after going off hook when the loop current sense bits are checked for overcurrent status (5/3 ms units). This is a bit mapped register.1 Answer tone length when answering a call (5/3 ms units). This register is only used if TATL (1E) has a value of zero. Receive scrambled ones V.22 length (5/3 ms units). Minimum length of time that an originating V.22 (1200 bps) modem must detect 1200 bps scrambled ones during a V.22 handshake. Second kissoff tone detector length. The security modes A1 and !1 will echo a "k" if a kissoff tone longer than the value stored in SKDTL is detected (10 ms units.) In the !7 security mode, this register represents a bit-mapped register. Carrier detect return. Minimum length of time that a carrier must return and be detected in order to be recognized after a carrier loss is detected (5/3 ms units). This is a bit-mapped register.1 Carrier detect timeout. Amount of time modem will wait for carrier detect before aborting call (1 second units). In the !7 alarm mode, this register functions as Handshake Tone Timeout, which defines how long the Si2400 waits for a handshake prior to sending the "N" result code. Delay between going off-hook and answer tone generation when in answer mode (53.33 ms units). Minimum number of consecutive ring pulses per ring burst. This is a bit mapped register.1 1 1 0x00 S31 S32 S33 S34 S35 0x31 0x32 0x33 0x34 0x35 RATL OCDT MDMO TASL RSOL 0x3C 0x0C 0x80 0x5A 0xA2 S36 0x36 SKDTL 0x30 S37 0x37 CDR 0x20 S38 S39 0x38 0x39 ARM2 CDT 0x38 0x3C S3A S3B S3C S62 S82 S83 SD1 SDB 0x3A 0x3B 0x3C 0x62 0x82 0x83 0xD1 0xDB ATD RP CIDG RC IST DCID INTS LVCS 0x29 0x03 0x04 0x00 0x00 -- 0x00 0x00 This is a bit mapped register. This is a bit mapped register. DTMF caller ID initialization. Intrusion state. Loop voltage (on-hook)/loop current (off-hook) register Notes: 1. These registers are explained in detail in the following section. 2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT, and REP. 46 Rev. 1.3 Si2400 Table 27. S-Register Summary (Continued) "S" Register Register Address (hex) Name Function Reset SDF SE0 SE1 SE2 SE3 SE4 SE5 SE5 SE5 SE5 SE6 SE6 SE6 SE8 SEB SF0 SF1 SF2 SF4 SF5 SF6 SF7 SF8 SF9 0xDF 0xE0 0xE1 0xE2 0xE3 0xE4 0xE5 0xE5 0xE5 0xE5 0xE6 0xE6 0xE6 0xE8 0xEB 0xF0 0xF1 0xF2 0xF4 0xF5 0xF6 0xF7 0xF8 0xF9 DGSR CF1 CLK1 GPIO GPD CF5 DADL DDL DSP1 DSP2 DADH DDH DSP3 DSPR4 TPD DAA0 DAA1 DAA2 DAA4 DAA5 DAA6 DAA7 DAA8 DAA9 This is a bit mapped register.1 This is a bit mapped This is a bit mapped This is a bit mapped This is a bit mapped This is a bit mapped register.1 register.1 register.1 register.1 register.1 0x00 0x22 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1C 0x00 0x0F 0x08 0x00 0x10 -- 0x20 (SE8 = 0x00) Write only definition. DSP register address lower bits [7:0].1 (SE8 = 0x01) Write only definition. DSP data word lower bits [7:0].1 (SE8 = 0x02) Read only definition. This is a bit mapped register.1 (SE8 = 0x02) Write only definition. This is a bit mapped register. (SE8 = 0x00) Write only definition. DSP register address upper bits [15:8] (SE8 = 0x01) Write only definition. DSP data word upper bits [13:8] (SE8 = 0x02) Write only definition. This is a bit mapped register.1 Set the mode to define E5 and E6 for low level DSP control. This is a bit mapped register. 1 1 1 1 1 This is a bit mapped register. This is a bit mapped register. This is a bit mapped register. This is a bit mapped This is a bit mapped This is a bit mapped This is a bit mapped This is a bit mapped This is a bit mapped register.1 register.1 register.1 register.1 register.1 register.1 Notes: 1. These registers are explained in detail in the following section. 2. The ring detector will only detect ringing if the ring burst on/off times meet the settings in MNRP, MXRP, MNRU, ROT, and REP. Rev. 1.3 47 Si2400 Table 28. Bit Mapped Register Summary "S" Register Register Register Address Name (hex) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Binary S07 S0C S11 S12 S13 S14 S15 S1F S33 S36 S38 S3C S62 S82 SDF SE0 SE1 SE2 SE3 SE4 SE5 SE5 SE5 SE5 SE6 SE6 SE6 0x07 0x0C 0x11 0x12 0x13 0x14 0x15 0x1F 0x33 0x36 0x38 0x3C 0x62 0x82 0xDF 0xE0 0xE1 0xE2 0xE3 0xE4 0xE5 0xE5 0xE5 0xE5 0xE6 0xE6 0xE6 MF1 MF2 ONHI OFHI MF3 MF4 MLC ARM3 MDMO ARM1 ARM2 CIDG RC IST DGSR CF1 CLK1 GPIO GPD CF5 DADL DDL DSP1 DSP2 DADH DDH DSP3 HDEN CDE BD V23R V23T 9BF BAUD BDL AVL[4:0] ACL[4:0] CCITT MLB FSK MCH 0000_0001 0000_0000 0100_1000 0100_0000 CIDM[1:0] DVL[2:0] DCL[2:0] JID MRCD ATPRE BTID UDF VCTE KOT[2:0] DON OFHE TEO FHGE OFHD AOC ENGE ONHD OD STB CIDB NLD CIDU IND PCM RD NBE 0001_0000 0000_0000 1000_0100 0010_1101 BDA[2:1] IMT[4:0] DOF PON[1:0] IDKT[1:0] HMT[2:0] NAT TSAC 1000_0000 0011_0000 0011_1000 0000_0100 POF[1:0] DBD DCF[1:0] IT[1:0] HF[1:0] CIDG[2:0] CLD OCR LLC WOR FLS LCLD DGSR[6:0] IR NLR IB[1:0] RR 0000_0000 0000_0000 0000_0000 IST[3:0] ICTS MCKR[1:0] GPIO4[1:0] AING[1:0] NBCK SBCK DRT[1:0] GPIO3[1:0] ND CLKD[4:0] GPIO2[1:0] GPD4 GPE GPD3 SD[2:0] 0010_0010 0000_0111 GPIO1[1:0] GPD2 APO GPD1 TRSP 0000_0000 0000_0000 0000_0000 0000_0000 0000_0000 DDAV TDET DTM[3:0] TONE[4:0] TONC[2:0] 0000_0000 0000_0000 0000_0000 0000_0000 CPSQ CPCD USEN2 USEN1 V23E ANSE DTMFE 0000_0000 48 Rev. 1.3 Si2400 Table 28. Bit Mapped Register Summary (Continued) "S" Register Register Register Address Name (hex) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Binary SEB SF0 SF1 SF2 SF4 SF5 SF6 SF7 SF8 SF9 0xEB 0xF0 0xF1 0xF2 0xF4 0xF5 0xF6 0xF7 0xF8 0xF9 TPD DAA0 DAA1 DAA2 DAA4 DAA5 DAA6 DAA7 DAA8 DAA9 LRV[3:0] OVL LMO SQLH FULL DCTO ARG[2:0] OHS ACT BTE PDN PDL PDDE LM HBE FDT ARL[1:0] DCT[1:0] FJM LIM DIAL ATL[1:0] RZ VOL RT FLVM OFHK 0000_0000 0000_0000 0001_1100 0000_0000 0000_1111 0000_1000 0000_0000 0001_0000 -- BTD ROV 0010_0000 Rev. 1.3 49 Si2400 S07 (MF1). Modem Functions 1 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 HDEN R/W BD R/W V23R R/W V23T R/W BAUD R/W CCITT R/W FSK R/W Reset settings = 0000_0001b (0x01) Bit Name Function HDLC Framing. 0 = Disable. 1 = Enable. 7 HDEN 6 BD Blind Dialing. 0 = Disable. 1 = Enable (Blind dialing occurs immediately after "ATDT#" command). 5 V23R V.23 Receive.* V.23 75 bps send/600 (BAUD = 0) or 1200 (BAUD = 1) bps receive. 0 = Disable. 1 = Enable. 4 V23T V.23 Transmit.* V.23 600 (BAUD = 0) or 1200 (BAUD = 1) bps send/75 bps receive. 0 = Disable. 1 = Enable. 3 2 Reserved BAUD Read returns zero. 2400/1200 Baud Select.* 2400/1200 baud select (V23R = 0 and V23T = 0). 0 = 1200 1 = 2400 600/1200 baud select (V23R = 1 and V23T = 1). 0 = 600 1 = 1200 1 CCITT CCITT/Bell Mode.* 0 = Bell. 1 = CCITT. 0 FSK 300 bps FSK.* 0 = Disable. 1 = Enable. *Note: See Table 12 on page 15 for proper setting of modem protocols. 50 Rev. 1.3 Si2400 S0C (MF2). Modem Functions 2 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 CDE R/W CIDM R/W 9BF R/W BDL R/W MLB R/W MCH R/W Reset settings = 0000_0000b (0x00) Bit Name Function Carrier Detect Enable. 0 = Disable. 1 = Enable GPI02 as an active low carrier detect pin (must also set SE2[3:2] [GPIO2] = 01b). 7 CDE 6:5 CIDM Caller ID Monitor. 00 = Caller ID monitor disabled (Normal caller ID operation). 01 = Caller ID monitor enabled. Si2400 must detect channel seizure signal followed by marks in order to report caller ID data. 10 = Caller ID monitor enabled. Si2400 must detect a DTMF A or D followed by marks in order to report caller ID data. 11 = Caller ID monitor enabled. Si2400 must only detect marks in order to report caller ID data. 4 3 Reserved 9BF Read returns zero. Ninth Bit Function. Only valid if the ninth bit escape is set S15[0] (NBE). 0 = Ninth bit equivalent to ALERT. 1 = Ninth bit equivalent to HDLC EOFR. 2 BDL Blind Dialing. 0 = Blind dialing disabled. 1 = Enables blind dialing after dial timeout register S02 (CW) expires. 1 MLB Modem Loopback. 0 = Not swapped. 1 = Swaps frequency bands in modem algorithm to do a loopback in a test mode. 0 MCH Miscellaneous Characters. 0 = Disables "." and "/" character echoing. 1 = Enables "." and "/" character echoing to indicate tone on and tone off for !7 operation. Rev. 1.3 51 Si2400 S11 (ONHI). On-Hook Intrusion Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DVL R/W AVL R/W Reset settings = 0100_1000b (0x48) Bit Name Function Differential Voltage Level. 7:5 4:0 DVL AVL Differential voltage level to detect intrusion event (2.75 V units.) Absolute Voltage Level. Absolute voltage level to detect intrusion event (2.75 V units added to 3 V.) S12 (OFHI). Off-Hook Intrusion Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DCL R/W ACL R/W Reset settings = 0100_0000b (0x40) Bit Name Function Differential Current Level. 7:5 4:0 DCL ACL Differential current level to detect intrusion event (3 mA units.) Absolute Current Level. When S13[4] (OFHD) = 0b, ACL represents the absolute current threshold used by the off-hook intrusion algorithm (3 mA units added to 12 mA.) When OFHD = 1b, see "5.5.5.Differential Algorithm #2" on page 20. 52 Rev. 1.3 Si2400 S13 (MF3). Modem Functions 3 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 JID R/W BTID R/W OFHE R/W OFHD R/W ONHD R/W CIDB R/W CIDU R/W PCM R/W Reset settings = 0001_0000b (0x10) Bit Name Function Japan Caller ID. 0 = Disable. 1 = Enable. 7 JID 6 BTID BT Caller ID Wetting Pulse. 0 = Enable. 1 = Disable. 5 OFHE Enable Off-Hook. Enable off hook in current limit mode for overcurrent detection. 0 = Disable. 1 = Enable. 4 OFHD Off-Hook Intrusion Detect Method. 0 = Absolute. 1 = Differential. 3 ONHD On-Hook Intrusion Detect Method. 0 = Absolute. 1 = Differential. 2 CIDB British Telecom Caller ID Decode. 0 = Disable. 1 = Enable. 1 CIDU BellCore Caller ID Decode. 0 = Disable. 1 = Enable. 0 PCM PCM Data Mode. DTE rate must be 228613, and flow control must be used. 0 = Disable. 1 = Enable. Rev. 1.3 53 Si2400 S14 (MF4). Modem Functions 4 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 MRCD R/W UDF R/W TEO R/W AOC R/W OD R/W NLD R/W IND R/W RD R/W Reset settings = 0000_0000b (0x00) Bit Name Function Disable Modem Result Codes. (See S62 also.) 0 = Enables the following modem result codes: 1 = Disables the following modem result codes: Intrusion--"i" and "I" Line present--"l" and "L" Flash--"f" Ring--"R" Register S62 can be used to individually re-enable particular result codes. 7 MRCD 6 UDF User Defined Frequency. 0 = Disable. 1 = Enable user defined frequency detectors in A0 and !0 modes. 5 TEO TIES Escape Operation. 0 = Disable TIES escape operation. 1 = Enable TIES. 4 AOC AutoOverCurrent Detection. 0 = Disables AutoOverCurrent detection. 1 = Enables AutoOverCurrent detection. 3 2 OD NLD Overcurrent Detected (Sticky). No Phone Line. This bit is sticky while off-hook if S82[3] (LCLD) = 1b, and non-sticky (status) while onhook. NLD remains sticky for 800 ms after going from off-hook to on-hook. 1 IND Intrusion Detected. This bit is normally NOT sticky so that the user may monitor/poll for intrusion manually. However, during dialing and during data mode, it is impossible to monitor/poll this bit. Therefore, if the Si2400 is either dialing or in data mode, this bit is sticky. If triggered during data mode, this bit will remain sticky for 800 ms after the Si2400 goes back on-hook. 0 RD Ring Detected (Sticky). This bit is normally sticky, but is cleared when the Si2400 goes from on-hook to off-hook. 54 Rev. 1.3 Si2400 S15 (MLC). Modem Link Control Bit D7 D6 D5 D4 D3 D2 D1 D0 Name ATPRE Type VCTE R/W FHGE R/W ENGE R/W STB R/W BDA R/W NBE R/W R/W Reset settings = 1000_0100b (0x84) Bit Name Function Answer Tone Phase Reversal. 7 ATPRE 0 = Disable. 1 = Enable answer tone phase reversal. 6 VCTE V.25 Calling Tone. 0 = Disable. 1 = Enable V.25 calling tone. 5 FHGE 550 Hz Guardtone. 0 = Disable. 1 = Enable 550 Hz guardtone. 4 ENGE 1800 Hz Guardtone. 0 = Disable. 1 = Enable 1800 Hz guardtone. 3 STB Stop Bits. 0 = 1 stop bit. 1 = 2 stop bits. 2:1 BDA Bit Data. 00 = 6 bit data. 01 = 7 bit data. 10 = 8 bit data. 11 = 9 bit data. 0 NBE Ninth Bit Enable. 0 = Disable. 1 = Enable ninth bit as Escape and ninth bit function (register C). Rev. 1.3 55 Si2400 S1F (ARM3). Alarm 3 (!7 Mode Only) Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 KOT R/W IMT R/W Reset settings = 0010_1101b (0x2D) Bit Name Function Kissoff Timeout. 7:5 4:0 KOT IMT 1 s units. Maximum 7 s. Intermessage Timing. 500 ms units. Maximum 8 s. Note: S1F is reconfigured as Alarm 3, a bit-mapped register, in !7 mode only. In all other modes, S1F is ATTD (Answer Tone to Transmit Delay). 56 Rev. 1.3 Si2400 S33 (MDMO). Modem Override Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DON R/W DOF R/W NAT R/W TSAC R/W Reset settings = 1000_0000b (0x80) Bit Name Function 7 6 Reserved DON Read returns one. On-Hook Intrusion Detect. 0 = Enable. 1 = Disable*. 5 DOF Off-Hook Intrusion Detect. 0 = Enable. 1 = Disable. 4:2 1 Reserved NAT Read returns zero. No Answer Tone. 0 = Disable. 1 = Enable no answer tone fast handshake. 0 TSAC Transmit Scrambler Active. 0 = Disable. 1 = Force transmit scrambler active once connected. *Note: When the Si2400 is on hook, the on-hook intrusion detector might not be immediately disabled by only setting the S33[6] (DON) = 1b (S33 = 0xCX, X indicates an otherwise appropriate value.) In order to guarantee that the result codes and the updating of S14[2] (NLD) and S14[1] (IND) are immediately disabled, ATS33=CX must be followed by ATSD1=00S14=X0. Rev. 1.3 57 Si2400 S36 (ARM1). Alarm 1 (!7 Mode Only) Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 POF R/W PON R/W IDKT R/W IT R/W Reset settings = 0011_0000b (0x30) Bit Name Function Pulse Off Time. 00 = 25 ms. 01 = 50 ms. 10 = 65 ms. 11 = Use S2C register. 7:6 POF 5:4 PON Pulse On Time. 00 = 25 ms. 01 = 50 ms. 10 = 65 ms. 11 = Use S2B register. 3:2 IDKT Intermessage Delay and Kissoff Timeout. This register field defines two parameters. The Intermessage Delay defines the time the Si2400 waits prior to sending a subsequent message. The Kissoff Timeout defines the time the Si2400 waits for a Kissoff Tone prior to declaring that there is no kissoff tone detected. 00 = Intermessage Delay is measured relative to the end of Kissoff and it is a fixed delay of 2.4 s. The Kissoff Timeout is measured relative to the end of Kissoff and it is a fixed value of 2 s. 01 = Intermessage Delay is measured relative to the end of Kissoff and it is determined by S1F[4:0] (IMT). The Kissoff Timeout is measured relative to the end of Kissoff and it is determined by S1F[7:5] (KOT). 10 = Intermessage Delay is measured relative to the end of the previous message and it is a fixed delay of 3.4 s. The Kissoff Timeout is measured relative to the end of Kissoff and it is a fixed value of 2 s. 11 = Intermessage Delay is measured relative to the end of the previous message and it is determined by S1F[7:5] (KOT). The Kissoff Timeout is measured relative to the end of Kissoff and it is determined by S1F[7:5] (KOT). 1:0 IT Interdigit Timing. The controlled timing between the pulse digits. 00 = The timing between the end of a digit to the start of the next digit is fixed at 660 ms. 01 = The timing between the end of a digit to the start of the next digit is defined by the S2D register. 10 = The timing between the start of a digit to the start of the next digit is fixed at 800 ms. 11 = The timing between the start of a digit to the start of the next digit is defined by the S2D register. Note: S36 is reconfigured as Alarm 1, a bit-mapped register, in !7 mode only. In all other modes, S36 is SKDTL (Second Kissoff Tone Detect Length). 58 Rev. 1.3 Si2400 S38 (ARM2). Alarm 2 (!7 Mode Only) Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DBD R/W DCF R/W HMT R/W HF R/W Reset settings = 0011_1000b (0x38) Bit Name Function Delay Before Data. 7 DBD Time the Si2400 waits prior to transmitting data, relative to the end of the handshake tone. 0 = 300 ms. 1 = Use S2E (RTCT) register contents. 6:5 DCF Data Carrier Frequency. Frequency that the Si2400 will use to transmit. 00 = User programmed. This is accomplished by accessing DSP register 5 prior to using the !7 command. 01 = 1800 Hz. 10 = 1900 Hz. 11 = 1850 Hz. 4:2 HMT Handshake Minimum Time. The minimum required tone length for a handshake tone or a kissoff tone. 000 = 53 ms. 001 = 160 ms. 010 = 320 ms. 011 = 480 ms. 100 = 640 ms. 101 = 800 ms. 110 = 960 ms. 111 = 1120 ms. 1:0 HF Handshake Frequency. The frequency that the Si2400 detects as Handshake and Kissoff Tone. 00 = User-defined frequency detectors must be programmed prior to using the !7 command. See DSP Registers. 01 = 1400 Hz only. 10 = 2300 Hz only. 11 = 1400 Hz or 2300 Hz. Note: S38 (ALARM2) is used in !7 mode only. Rev. 1.3 59 Si2400 S3C (CIDG). Caller ID Gain Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 CIDG R/W Reset settings = 0000_0100b (0x04) Bit Name Function 7:3 2:0 Reserved CIDG Read returns 0. Caller ID Gain. The Si2400 dynamically sets the On-Hook Analog Receive Gain SF4[6:4] (ARG) to CIDG during a caller ID event (or continuously if S0C[6:5] (CIDM = 11b). This field should be set prior to caller ID operation. 000 = 7 dB 001 = 6 dB 010 = 4.8 dB 011 = 3.5 dB 100 = 2.0 dB 101 = 0 dB 110 = -2.0 dB 111 = -6.0 dB 60 Rev. 1.3 Si2400 S62 (RC). Result Codes Override Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 CLD R/W OCR R/W LLC R/W WOR R/W FLS R/W IR R/W NLR R/W RR R/W Reset settings = 0000_0000b (0x00) Bit Name Function Carrier Loss Detector. 0 = Default. 1 = Caller ID sensitivity can be increased by 5 dB. When CLD = 1, the host is responsible for terminating caller ID reception by asserting an escape and issuing the ATH command. Note: This bit also controls the carrier loss detection of non-caller ID modes of operation. Therefore, the host must set CLD = 0 prior to answering a call via "ATA" or initiating a call via "ATDT" or "ATDP". 7 CLD 6 OCR Overcurrent Result Code ("x"). 0 = Enable. 1 = Disable. 5 LLC Low Loop Current (required for CTR21 operation). This feature only works when SDF 0x00. 0 = Disable. 1 = Enable. 4 WOR Wake-On-Ring Alert. 0 = Alert is not asserted upon a wake-on-ring event. 1 = Alert is asserted upon a wake-on-ring event SE2[7:6] (GPIO4) = 11b. 3 FLS Hookswitch Flash Result Code ("f").* 0 = Disable. 1 = Enable. 2 IR Intrusion Result Code ("I" and "i").* 0 = Disable. 1 = Enable. 1 NLR No Phone Line Result Code ("L" and "l").* 0 = Disable. 1 = Enable. 0 RR Ring Result Code ("R").* 0 = Disable. 1 = Enable. *Note: S62[3] (FLS), S62[2] (IR), S62[1] (NLR), and S62[0] (RR) only apply if S14[7] (MRCD) = 1. Rev. 1.3 61 Si2400 S82 (IST). Intrusion Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 IST R/W LCLD R/W IB R/W Reset settings = 0000_0000b (0x00) Bit Name Function Intrusion Settling Time. 0000 = IST equals 1 second. Delay between when the ISOmodem goes off-hook and the off-hook intrusion algorithm begins (250 ms units). 7:4 IST 3 LCLD Loop Current Loss Detect. 0 = Disable. 1 = Enables the reporting of "I" and "L" result codes while off-hook. Will assert ALERT if GPIO4 (SE2[7:6]) is enabled as ALERT. Will assert NLD (S14[2]). 2:1 IB Intrusion Blocking. This feature only works when SDF 0x00. Defines the method used to block the off-hook intrusion algorithm from operating after dialing has begun. 00 = No intrusion blocking. 01 = Intrusion disabled from start of dial to end of dial. 10 = Intrusion disabled from start of dial to register S29 time out. 11 = Intrusion disabled from start of dial to carrier detect or to "N" or "n" result code. 0 Reserved Read returns 0. SDF (DGSR). Intrusion Deglitch Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DGSR R/W Reset settings = 0000_0000b (0x00) Bit Name Function 7 6:0 Reserved DGSR Read returns zero. Deglitch Sample Rate. Sets the sample rate for the deglitch algorithm and the off-hook intrusion algorithm (40 ms units). 0000000 = Disables the deglitch algorithm, and sets the off-hook intrusion sample rate to 200 ms and delay between compared samples to 800 ms. 62 Rev. 1.3 Si2400 SE0 (CF1). Chip Functions 1 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 ICTS R/W ND R/W SD R/W Reset settings = 0010_0010b (0x22) Bit Name Function 7:6 5 Reserved ICTS Read returns zero. Invert CTS pin. 0 = Inverted (CTS). 1 = Normal (CTS). 4 3 2:0 Reserved ND SD Read returns zero. 0 = 8N1. 1 = 9N1 (hardware UART only). Serial Dividers. 000 = 300 bps serial link. 001 = 1200 bps serial link. 010 = 2400 bps serial link. 011 = 9600 bps serial link. 100 = 19200 bps serial link. 101 = 228613 bps serial link (0.8% error to 230400 bps). 110 = 245760 bps serial link. 111 = 307200 bps serial link. Rev. 1.3 63 Si2400 SE1 (CLK1). Clock 1 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 MCKR R/W CLKD R/W Reset settings = 0000_0111b (0x07) Bit Name Function Microcontroller Clock Rate. 0 = Fastest 9.8304 MHz. 1 = 4.9152 MHz. 2 = 2.4576 MHz. 3 = Reserved. Note: MCKR must be set to 0 when the UART DTE rate is set to 228613 or greater (SE0[2:0] (SD) = 101b, 110b or 111b). 7:6 MCKR 5 4:0 Reserved CLKD Read returns zero. CLK_OUT Divider. 00000 = Disable CLK_OUT pin. CLK_OUT = 78.6432/(CLKD + 1) MHz. 00111b CLK_OUT = 9.8304 MHz. 64 Rev. 1.3 Si2400 SE2 (GPIO). General Purpose Input/Output Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 GPIO4 R/W GPIO3 R/W GPIO2 R/W GPIO1 R/W Reset settings = 0000_0000b (0x00) Bit Name Function GPIO4. 00 = Digital input. 01 = Digital output (relay drive). 10 = Analog input. 11 = ALERT function triggered by loss of carrier (always), V.23 reversal (always), wakeon-ring S62[4] (WOR), parallel phone intrusion S33[5] (DOF), or loss of loop current S82[3] (LCLD). 7:6 GPIO4 5:4 GPIO3 GPIO3. 00 = Digital input. 01 = Digital output (relay drive). 01 = Analog input. 11 = ESCAPE function (digital input). 3:2 GPIO2 GPIO2*. 00 = Digital input. 01 = Digital output (relay drive; also used for CD function). 10 = Analog input. 11 = Reserved. 1:0 GPIO1 GPIO1*. 00 = Digital input. 01 = Digital output (relay drive). 10 = Analog input. 11 = Reserved. *Note: To be used as analog input or GPIO pins; SE4[3] (GPE) and SE4[0] (TRSP) must both equal zero. Rev. 1.3 65 Si2400 SE3 (GPD). GPIO Data Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 AING R/W GPD4 R/W GPD3 R/W GPD2 R/W GPD1 R/W Reset settings = 0000_0000b (0x00) Bit Name Function AIN Gain Bits. 00 = 0 dB 01 = 6 dB 10 = 2.5 dB 11 = 12 dB 7:6 AING 5:4 3 Reserved GPD4 Read returns zero. GPIO4 Data. 0 1 2 GPD3 GPIO3 Data. 0 1 1 GPD2 GPIO2 Data. 0 1 GPIO1 Data. 0 1 0 GPD1 66 Rev. 1.3 Si2400 SE4 (CF5). Chip Functions 5 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 NBCK R SBCK R DRT R/W GPE R/W APO R/W TRSP R/W Reset settings = 0000_0000b (0x00) Bit Name Function 9600 Baud Clock (Read Only). 600 Baud Clock (Read Only). Data Routing (See Figure 10). 00 = Data mode, DSP output transmitted to line, line received by DSP input. 01 = Voice mode, selected AIN transmitted to line, line received by AOUT. 10 = Loopback mode, RXD through microcontroller (DSP) to TXD. AIN looped to AOUT. 11 = Codec mode, data from DSPOUT to AOUT, AIN to DSPIN. GPIO1 Enable. 0 = Disable. 1 = Enable GPIO1 to be HDLC end-of-frame flag. 7 6 5:4 NBCK SBCK DRT 3 GPE* 2 1 Reserved APO Read returns zero. Analog Power On. 0 = Disable. 1 = Power on analog ADC and DAC. TXD2/RXD2 Serial Port. 0 = Disable. 1 = Enable TXD2/RXD2 serial port so that RXD2 is GPIO1 and TXD2 is GPIO2. 0 TRSP* *Note: GPE and TRSP are mutually exclusive. Only one can be set at any one time, and they override the settings in registers GPIO2 and GPIO1. Once TXD2 and RXD2 are enabled through TRSP = 1b, the primary serial port TXD and RXD no longer function and pins TXD2 and RXD2 control the Si2400. This feature allows a second microcontroller to control the Si2400. Rev. 1.3 67 Si2400 SE5 (DSP1). (SE8 = 0x02) Read Only Definition Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DDAV R TDET R TONE R Reset settings = 0000_0000b (0x00) Bit Name Function DSP Data Available. Tone Detected. Indicates a TONE (any of type 0-25 below) has been detected. 0 = Not detected. 1 = Detected. 7 6 DDAV TDET 5 4:0 Reserved TONE Read returns zero. Tone Type Detected. When TDET goes high, TONE indicates which tone has been detected from the following: TONE Tone Type Priority 00000-01111 DTMF 0-15 (DTMFE = 1)1 See Table 23 on page 39 1 2 2 10000 Answer tone detected 2100 Hz (ANSE = 1) 10001 Bell 103 answer tone detected 2225 Hz (ANSE = 1) 2 10010 V.23 forward channel mark 1300 Hz (V23E = 1)3 3 10011 V.23 backward channel mark 390 Hz (V23E = 1) 3 10100 User defined frequency 1 (USEN1 = 1)4 4 10101 User defined frequency 2 (USEN1 = 1) 4 10110 Call progress filter A detected 6 10111 User defined frequency 3 (USEN2 = 1)5 5 11000 User defined frequency 4 (USEN2 = 1) 5 11001 Call progress filter B detected 6 Notes: 1. SE6[0] (DTMFE) SE8 = 0x02. 2. SE6[1] (ANSE) SE8 = 0x02. 3. SE6[2] (V23E) SE8 = 0x02. 4. SE6[3] (USEN1) SE8 = 0x02. 5. SE6[4] (USEN2) SE8 = 0x02. 68 Rev. 1.3 Si2400 SE5 (DSP2). (SE8 = 0x02) Write Only Definition Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 DTM W TONC W Reset settings = 0000_0000b (0x00) Bit Name Function 7 6:3 2:0 Reserved DTM TONC Always write zero. DTMF tone (0-15) to transmit when selected by TONC = 001b. See Table 23 on page 39. Tone Tone Type 000 001 010 011 100 101 110 Mute DTMF 2225 Hz Bell mode answer tone with phase reversal 2100 Hz CCITT mode answer tone with phase reversal 2225 Hz Bell mode answer tone without phase reversal 2100 Hz CCITT mode answer tone without phase reversal User-defined programmable frequency tone (UFRQ) (see Table 24 on page 40, default = 1700 Hz) 1300 Hz V.25 calling tone 111 Rev. 1.3 69 Si2400 SE6 (DSP3). (SE8 = 0x02) Write Only Definition Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 CPSQ W CPCD W USEN2 USEN1 W W V23E W ANSE W DTMFE W Reset settings = 0000_0000b (0x00) Bit Name Function 0 = Disable. 1 = Enables a squaring function on the output of filter B before the input to A (cascade only). 0 = Call progress filter B output is input into call progress filter A. Output from filter A is used in the detector. 1 = Cascade disabled. Two independent fourth order filters available (A and B). The largest output of the two is used in the detector. 0 = Disable. 1 = Enable the reporting of user defined frequency tones 3 and 4 through TONE. 0 = Disable. 1 = Enable the reporting of user defined frequency tones 1 and 2. 0 = Disable. 1 = Enable the reporting of V.23 tones, 390 Hz and 1300 Hz. 0 = Disable. 1 = Enable the reporting of answer tones. 0 = Disable. 1 = Enable the reporting of DTMF tones. 7 CPSQ 6 CPCD 5 4 3 2 1 0 Reserved USEN2 USEN1 V23E ANSE DTMFE SEB (TPD). Timer and Power Down Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 PDDE R/W Reset settings = 0000_0000b (0x00) Bit Name Function 7:4 3 Reserved PDDE Read returns zero. Power Down DSP Engine. 0 = Power on 1 = Power down 2:0 Reserved Read returns zero. 70 Rev. 1.3 Si2400 SF0 (DAA0). DAA Low Level Functions 0 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 LM R/W OFHK R/W Reset settings = 0000_0000b (0x00) Bit Name Function 7:2 1 0 Reserved LM OFHK Read returns zero. Hook Control/Status.1,2 OFHK LM LM0 0 0 1 0 1 1 1 0 0 Else Reserved Line Status Mode On-hook On-hook line monitor mode (Si3015 compatible) Off-hook Notes: 1. See Register F7 on page 76 for LM0. 2. Under normal operation, the Si2400 internal microcontroller will automatically set these bits appropriately. Rev. 1.3 71 Si2400 SF1 (DAA1). DAA Low Level Functions 1 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 BTE R/W PDN R/W PDL R/W HBE Reset settings = 0001_1100b (0x1C) Bit Name Function Billing Tone Enable. 7 BTE When the Si3015 detects a billing tone, SF9[3] (BTD) is set. 0 = Disable. 1 = Enable. 6 PDN Power Down. 0 = Normal operation. 1 = Powers down the Si2400. 5 PDL Power Down Line-Side Chip (typically only used for board level debug.) 0 = Normal operation. Program the clock generator before clearing this bit. 1 = Places the Si3015 in lower power mode. 4:3 2 Reserved HBE Do Not Modify Hybrid Transmit Path Connect. 0 = Disable. 1 = Enable. 1:0 Reserved Do Not Modify SF2 (DAA2). DAA Low Level Functions 2 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 FDT R Reset settings = 0000_0000b (0x00) Bit Name Function 7:4 3 Reserved FDT Read only. Frame Detect (Typically only used for board-level debug.) 1 = Indicates link frame lock has been established. 0 = Indicates link frame lock has not been established. 2:0 Reserved Reserved 72 Rev. 1.3 Si2400 SF4 (DAA4). DAA Low Level Functions 4 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 SQLH R/W ARG R/W ARL R/W ATL R/W Reset settings = 0000_1111b (0x0F) Bit Name Function Ring Squelch. 7 SQLH If the host implements a manual ring detect (bypassing the Si2400 micro), this bit must be set, then cleared following a polarity reversal detection. Used to quickly recover offset on RNG1/2 pins after polarity reversal. 0 = Normal. 1 = Squelch. 6:4 ARG Analog Receive Gain. Off-Hook On-Hook 000 = 0 dB gain 000 = 7 dB 001 = 3 dB gain 001 = 6 dB 010 = 6 dB gain 010 = 4.8 dB 011 = 9 dB gain 011 = 3.5 dB 1xx = 12 dB gain 1xx = 2.0 dB 3:2 ARL AOUT Receive--Path Level. DAA receive path signal AOUT gain. 00 = 0 dB 01 = -6 dB 10 = -12 dB* 11 = Mute 1:0 ATL AOUT Transmit--Path Level. DAA transmit path signal AOUT gain. 00 = -18 dB 01 = -24 dB 10 = -30 dB* 11 = Mute Rev. 1.3 73 Si2400 SF5 (DAA5). DAA Low Level Functions 5 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 FULL R/W DCTO R/W OHS R/W ACT R/W DCT R/W RZ R/W RT R/W Reset settings = 0000_1000b (0x08) Bit Name Function Full Scale. 0 = Si3015 ADC/DAC full scale > -1 dBm. 1 = Si3015 ADC/DAC full scale > 3.2 dBm. This bit changes the full scale of the ADC and DAC from -1 dBm min. to 3.2 dBm min. In order to use this bit, the R2 resistor must be changed from 402 to 243 and ACT (SF5, bit 4) must be set to 0. This bit is intended for use only in voice communications and may be used in PCM modes. DC Termination Off. 0 = Normal operation. The OFF bit must always be set to 0 when on-hook. 1 = DC termination disabled and the device presents an 800 dc impedance to the line which is used to enhance operation with an off-hook parallel phone. On-Hook Speed (See Table 13 and "Appendix A--DAA Operation"). 0 = The Si2400 will execute a fast on-hook. 1 = The Si2400 will execute a slow, controlled on-hook. 7 FULL 6 DCTO 5 OHS 4 ACT AC Termination (See Table 13 and "Appendix A--DAA Operation"). 0 = Real impedance. 1 = Complex impedance. 3:2 DCT DC Termination Voltage (See Table 13 and "Appendix A--DAA Operation"). 00 = Low Voltage Mode (transmit level = -5 dBm). 01 = Japan mode (transmit level = -3 dBm). 10 = USA mode (transmit level = -1 dBm). 11 = CTR21/France current limit mode (transmit level = -1 dBm). 1 RZ Ringer Impedance. 0 = Maximum (high) ringer impedance. 1 = Synthesize ringer impedance. Ringer Threshold Select. Used to satisfy country requirements on ring detection. Signals below the lower level will not generate a ring detection; signals above the upper level are guaranteed to generate a ring detection. 0 = 11 to 22 VRMS. 1 = 17 to 33 VRMS. 0 RT 74 Rev. 1.3 Si2400 SF6 (DAA6). DAA Low Level Functions 6 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 FJM R/W DIAL VOL R/W FLVM R/W Reset settings = 0000_0000b (0x00) Bit Name Function 7:4 3 Reserved FJM Read returns zero. Force Japan DC Termination. 0 = Normal mode. 1 = Force Japan dc termination. 2 DIAL DTMF Dialing Mode. This bit should be set during DTMF dialing in CTR21 mode if SDB (LVCS) < 12. 0 = Normal operation. 1 = Increase headroom for DTMF dialing. Line Voltage Adjust. 0 = Nominal. 1 = Decreases dc termination voltage. 1 VOL 0 FLVM Force Low Voltage Mode. When SF5[3:2] (DCT) = 10b (FCC mode), setting FLVM will force the Low Voltage mode (see DCT = 00) while allowing for a transmit level of -1 dBm. 0 = Disable. 1 = Enable. Rev. 1.3 75 Si2400 SF7 (DAA7). DAA Low Level Functions 7 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 LM0 R/W LIM R/W Reset settings = 0001_0000b (0x10) Bit Name Function 7:5 4 Reserved LM0 Read returns zero. See LM0 in Register F0 page 71. 0 1 Current-Limiting Adjust Value. 0 = Disable. 1 = Enable (CTR21 mode). 3 LIM 2:0 Reserved Read returns zero. SF8 (DAA8). DAA Low Level Functions 8 Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 LRV R Bit Name Function Line-Side Chip Revision Number. 7:4 LRV 1001 = Si3015 Rev A 1010 = Si3015 Rev B 1011 = Si3015 Rev C 1100 = Si3015 Rev D 3:0 Reserved Read returns indeterministic. 76 Rev. 1.3 Si2400 SF9 (DAA9). DAA Low Level Functions 9 Read Only Bit Name Type D7 D6 D5 D4 D3 D2 D1 D0 OVL R BTD R ROV R Reset settings = 0010_0000b (0x20) Bit Name Function 7 6 5:4 3 Reserved OVL Reserved BTD Read returns zero. Receive Overload (see "Appendix A--DAA Operation"). Same as ROV, except non-sticky. Do Not Modify. Billing Tone Detect (sticky). (See "Appendix A--DAA Operation".) 0 = No billing tone detected. 1 = Billing tone detected. 2 1 Reserved ROV Read returns zero. Receive Overload (sticky) (see "Appendix A--DAA Operation"). 0 = No excessive level detected. 1 = Excessive input level detected. 0 Reserved Read returns zero. Rev. 1.3 77 Si2400 APPENDIX A--DAA OPERATION Introduction This section describes the detailed functionality of the integrated DAA included in the Si2400 chipset. This specific functionality is generally transparent to the user when using the on-chip controller in the Si2400 modem. When bypassing the on-chip controller, the low-level DAA functions of the Si3015 described in this section can be controlled through S registers. EN55022 and CISPR-22 Compliance Compliance to the EN55022:1998 standard will be necessary to conform to the European Union's EMC Directive. Adherence to this standard will be necessary to display the CE mark on designs intended for sale in the EU. The deadline for EN55022 and CISPR-22 compliance is August 1, 2003. However, some nonEuropean countries currently require compliance to the CISPR-22 specification. The typical schematic (Figure 3) and global bill of materials (BOM) (page 11) contained in this data sheet is designed to be compliant to the above mentioned standards. It should be noted that L1, L2, R31, R32, C38, and C39 are only necessary for those products which are intended for sale in the European Union or require CISPR-22 compliance. If this is not the target market then L1 and L2 can be replaced with 0 resistors and R31, R32, C38, and C39 need not be populated. While this population option achieves EN55022 and CISPR-22 compliance, there are several system dependent and country dependent issues worth considering. The first relates to the direct current resistance (DCR) of the inductors. If the selected inductors have a DCR of less than 3 each, then countries which require 300 or less of dc resistance at TIP and RING with 20 mA of loop current can be satisfied with the Japan dc termination mode (SF5[3:2] [DCT] = 01b). If the selected inductors have a DCR of greater than 3 but less than 8 each, then low voltage dc termination mode (DCT = 00) must be used to satisfy the above requirement. In either case, Silicon Laboratories strongly recommends users of the ISOmodem adhere to the section "DC Termination Considerations" for dc termination requirements. The second consideration relates to the power supply of the target system. The recommended values for L1, L2, R31, R32, C38, and C39 assume that the target system provides a direct current connection between the target system's reference ground (Si2400 GND) and an external ground (often the third prong of a power plug). If there is no direct connection between the reference ground and external ground, then smaller inductor values are possible. It should be understood that this consideration is system dependent, and the impedance between the system ground and the external ground in the range of 500 kHz and 10 MHz should be well known. Please contact a Silicon Laboratories technical representative for further assistance in analyzing or testing systems for this consideration. DAA Isolation Barrier The Si2400 chipset consists of the Si3015 line-side device and the Si2400 modem device. The Si2400 achieves an isolation barrier through a low-cost, highvoltage capacitor in conjunction with Silicon Laboratories' proprietary signal processing techniques. These techniques eliminate any signal degradation due to capacitor mismatches, common mode interference, or noise coupling. As shown in Figure 3 on page 10, the C1, C4, C24, and C25 capacitors isolate the Si2400 (DSP-side) from the Si3015 (line-side). All transmit, receive, and control data are communicated through this barrier. Emissions/Immunity The Si2400 chipset and recommended DAA schematic is fully compliant with and passes all international electromagnetic emissions and conducted immunity tests (includes FCC part 15,68; EN50082-1). Careful attention to the Si2400 bill of materials (page 11), schematic (Figure 3 on page 10), and layout guidelines (included in the Si2400URT-EVB data sheet) will ensure compliance with these international standards. In designs with difficult layout constraints, the addition of the C22 and C30 capacitors to the C24 and C25 recommended capacitors may improve modem performance on emissions and conducted immunity. Also, under some layout conditions, C22 and C30 may improve the immunity to telephone line transients. This is most important for applications that use the voice codec feature of the Si2400. Because line transients are infrequent and high voltage in nature, they tend to be more problematic in voice applications than in data applications. An occasional pop in a voice application is quite noticeable, whereas occasional bit errors are easily corrected in a modem connection with an errorcorrection protocol. 78 Rev. 1.3 Si2400 DC Termination The Si2400 has four programmable dc termination modes which are selected with SF5[3:2] (DCT). FCC mode (DCT = 10b), shown in Figure 14, is the default dc termination mode and supports a transmit full scale level of -1 dBm at TIP and RING. This mode meets FCC requirements in addition to the requirements of many other countries. FCC DCT M ode 12 Japan mode DCT = 01b, shown in Figure 16, is a lower voltage mode and supports a transmit full scale level of -2.71 dBm. Higher transmit levels for DTMF dialing are also supported. See "DTMF Dialing" on page 80. The low voltage requirement is dictated by countries such as Japan and Malaysia. Japan DCT M ode 10.5 V oltage A c ros s DA A (V ) 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 V oltage A c ros s DA A (V ) 11 10 9 8 7 6 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11 .11 Loop Current (A ) Figure 16. Japan Mode I/V Characteristics Low Voltage mode (DCT = 00b), shown in Figure 17, is the lowest line voltage mode supported on the Si2400, with a transmit full scale level of -5 dBm. Higher transmit levels for DTMF dialing are also supported. See "DTMF Dialing". This low voltage mode is offered for situations that require very low line voltage operation. It is important to note that this mode should only be used when necessary, as the dynamic range will be significantly reduced and thus the ISOmodem will not be able to transmit or receive large signals without clipping them. Low V oltage M ode 10.5 Loop Current (A ) Figure 14. FCC Mode I/V Characteristics CTR21 mode DCT = 11b, shown in Figure 15, provides current limiting while maintaining a transmit full scale level of -1 dBm at TIP and RING. In this mode, the dc termination will current limit before reaching 60 mA. CTR21 DCT M ode 45 V oltage A c ros s DA A (V ) 40 35 30 V oltage A c ros s DA A (V ) 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 .01 .02 .03 .04 .05 .06 .07 .08 .09 .1 25 20 15 10 5 .015 .02 .025 .03 .035 .04 .045 .05 .055 .06 Loop Current (A ) Figure 15. CTR21 Mode I/V Characteristics .11 Loop Current (A ) Figure 17. Low Voltage Mode I/V Characteristics Rev. 1.3 79 Si2400 AC Termination The Si2400 has two ac termination impedances, selected with SF5[4] (ACT). ACT = 0b is a real, nominal 600 termination which satisfies the impedance requirements of FCC part 68, JATE, and other countries. This real impedance is set by circuitry internal to the Si2400 chipset as well as the resistor R2 connected to the Si3015 REXT pin. ACT = 1b is a complex impedance which satisfies the impedance requirements of Australia, New Zealand, South Africa, CTR21 and some European NET4 countries such as the UK and Germany. This complex impedance is set by circuitry internal to the Si2400 chipset as well as the network connected to the Si3015 REXT2 pin. termination mode (DCT = 01b) or the Low Voltage termination mode (DCT = 00b). SF6[3] (FJM) and SF6[0] (FLVM) have no effect in any other termination mode other than the FCC dc termination mode. Pulse Dialing Pulse dialing is accomplished by going off and on hook to generate make and break pulses. The nominal rate is 10 pulses per second. Some countries have very tight specifications for pulse fidelity, including make and break times, make resistance, and rise and fall times. In a traditional solid-state dc holding circuit, there are a number of issues in meeting these requirements. The Si2400 dc holding circuit has active control of the on-hook and off-hook transients to maintain pulse dialing fidelity. Spark quenching requirements in countries such as Italy, Netherlands, South Africa and Australia deal with the on-hook transition during pulse dialing. These tests provide an inductive dc feed, resulting in a large voltage spike. This spike is caused by the line inductance and the sudden decrease in current through the loop when going on-hook. The traditional way of dealing with this problem is to put a parallel RC shunt across the hookswitch relay. The capacitor is large (~1 F, 250 V) and expensive. In the Si2400, SF5[6:5] (OHS) can be used to slowly ramp down the loop current to pass these tests without requiring additional components. Ringer Impedance The ring detector in a typical DAA is ac coupled to the line with a large, 1 F, 250 V decoupling capacitor. The ring detector on the Si2400 is also capacitively coupled to the line, but it is designed to use smaller, less expensive 560 pF capacitors. Inherently, this network produces a very high ringer impedance to the line on the order of 800 to 900 k. This value is acceptable for most countries, including FCC and CTR21. Several countries, including Poland, South Africa and South Korea, require a maximum ringer impedance. For Poland, South Africa and South Korea, the maximum ringer impedance specification can be met with an internally synthesized impedance by setting SF5[1] (RZ) = 1b. Billing Tone Detection "Billing tones" or "metering pulses" generated by the central office can cause modem connection difficulties. The billing tone is typically either a 12 KHz or 16 KHz signal and is sometimes used in Germany, Switzerland, and South Africa. Depending on line conditions, the billing tone may be large enough to cause major modem errors. The Si2400 chipset can provide feedback when a billing tone occurs and when it ends. Billing tone detection is enabled by setting SF1[7] (BTE) = 1b. Billing tones less than 1.1 VPK on the line will be filtered out by the low pass digital filter on the Si2400. SF9[1] (ROV) is set when a line signal is greater than 1.1 VPK, indicating a receive overload condition. SF9[3] (BTD) is set when a line signal (billing tone) is large enough to excessively reduce the linederived power supply of the line-side device (Si3015). When the BTD bit is set, the dc termination is changed to an 800 dc impedance. This ensures minimum line voltage levels even in the presence of billing tones. The OVL bit should be polled following a billing tone detection. When the OVL bit returns to zero, indicating that the billing tone has passed, the BTE bit should be written to zero to return the dc termination to its original DTMF Dialing In CTR21 dc termination mode, set SF6[2] (DIAL) = 1b during DTMF dialing if SDB (LVCS) 11. Setting this bit increases headroom for large signals. This bit should only be used during dialing and if SDB (LVCS) < 11. In Japan dc termination mode (SF5[3:2] (DCT) = 01b), the ISOmodem attenuates the transmit output by 1.7 dB to meet headroom requirements. Similarly, in Low Voltage mode (DCT = 00b), the ISOmodem attenuates the transmit output by 4 dB. However, when DTMF dialing is desired in these modes, this attenuation must be removed. This is achieved by entering the FCC dc termination mode and setting SF6[3] (FJM) = 1b or SF6[0] (FLVM) = 1. When in the FCC dc termination modes, these bits will enable the respective lower loop current termination modes without the associated transmit attenuation. Increased distortion may be observed, which is acceptable during DTMF dialing. After DTMF dialing is complete, the attenuation should be enabled by returning to either the Japan dc 80 Rev. 1.3 Si2400 state. It will take approximately one second to return to normal dc operating conditions. The BTD and ROV bits are sticky, and they must be written to zero to be reset. After the BTE, ROV, and BTD bits are all cleared, the BTE bit can be set to reenable billing tone detection. Certain line events, such as an off-hook event on a parallel phone or a polarity reversal, may trigger the ROV or the BTD bits, after which the billing tone detector must be reset. The user should look for multiple events before qualifying whether billing tones are actually present. Although the DAA will remain off-hook during a billing tone event, the received data from the line will be corrupted (or a modem disconnect or retrain may occur) in the presence of large billing tones. If the user wishes to receive data through a billing tone, an external LC filter must be added. A modem manufacturer can provide this filter to users in the form of a dongle that connects on the phone line before the DAA. This keeps the manufacturer from having to include a costly LC filter internal to the modem when it may only be necessary to support a few countries/customers. Alternatively, when a billing tone is detected, the host software may notify the user that a billing tone has occurred. This notification can be used to prompt the user to contact the telephone company and have the billing tones disabled or to purchase an external LC filter. C1 C2 L3 TIP FROM LINE L4 C3 To DAA RING Figure 18. Billing Tone Filter ` Table 29. Component Values--Optional Billing Tone Filters Symbol Value C1,C2 C3 L3 L4 0.027 F, 50 V, 10% 0.01 F, 250 V, 10% 3.3 mH, >120 mA, <10 , 10% 10 mH, >40 mA, <10 , 10% Billing Tone Filter (Optional) In order to operate without degradation during billing tones in Germany, Switzerland, and South Africa, an external LC notch filter is required. (The Si3015 can remain off-hook during a billing tone event, but modem data will be lost [or a modem disconnect or retrain may occur] in the presence of large billing tone signals.) The notch filter design requires two notches, one at 12 KHz and one at 16 KHz. Because these components are fairly expensive and few countries supply billing tone support, this filter is typically placed in an external dongle or added as a population option for these countries. Figure 18 shows an example billing tone filter. Figure 19 shows the billing tone filter and the ringer impedance network for the Czech Republic. Both of these circuits may be combined into a single external dongle. L3 must carry the entire loop current. The series resistance of the inductors is important to achieve a narrow and deep notch. This design has more than 25 dB of attenuation at both 12 KHz and 16 KHz. C1 0.027 F, 50 V C2 0.027 F, 50 V L3 3.3 mH, 120 mA TIP L4 3.3 mH, 40 mA From Line C3 0.01 F, 250 V To Si3015 Chipset RING Figure 19. Dongle Applications Circuit Rev. 1.3 81 Si2400 The billing tone filter affects the ac termination and return loss. The current complex ac termination will pass worldwide return loss specifications both with and without the billing tone filter by at least 3 dB. The ac termination is optimized for frequency response and hybrid cancellation, while having greater than 4 dB of margin with or without the dongle for South Africa, Australia, CTR21, German, and Swiss country-specific specifications. The Si2400 receives the loopback tone and should be programmed to drive the tone to AOUT. This approach requires loop current consistent with the equivalent circuit shown in Figure 1. As an example, the following strings can be sent to the Si2400 to set up the 2225 Hz answer tone as the stimulus waveform. 1. ATE0SF1=18SF7=00SF0=01 to go off hook and to disable transmit hybrid. 2. ATSE4=02M2SF4=03 to drive AOUT with the received loopback tone from the line. 3. ATSE8=00SE6=00SE5=0BSE8=01SE6=08SE5=FCSE8=0 0 to set the tone amplitude to -12 dBm. 4. ATSE8=02SE5=04SE6=02 to begin the 2225 Hz answer tone. In-Circuit Testing The Si2400's advanced design provides the system manufacturer with increased ability to determine system functionality during production line test, as well as support for end-user diagnostics. The CLKOUT pin of the Si2400 can be used as an initial indication that the Si2400 is functional. Upon power up and the negation of the reset pin, the CLKOUT pin oscillates at 9.8304 MHz, which is twice the input clock frequency of 4.9152 MHz. Testing the frequency of CLKOUT indicates that the Si2400 internal clock is operational. To test communication with the Si2400 across the UART, the local echo may be used immediately after the part has been properly reset. There are many methods to check to discover whether the ISOCAP link between the Si2400 and Si3015 is operational. These tests do not require any loop current on the DAA. The first method is to check SF2[3] (FDT). If it is set, the Si2400 and the Si3015 are communicating. Another method is to read SF8[7:4] (LRV) to verify the Si3015 is properly sending its version number back to the Si2400. Finally, the voltage between the Si3015 VREG pin and the IGND pin may be measured and must exceed 3.6 V. Once the clock, UART, and isolation link have been proven to function, the production test can proceed to verify operation of the discrete components mounted on the board. In general, there are two approaches to production line test. The first approach is to execute complete modem connections through a commercially available telephone line simulator. This approach is simple to implement but incurs a relatively long per unit test time. If per unit test time is an important consideration, another approach is to use the internal tone generator on the Si2400 to generate a tone at TIP/ RING. The Si3015 can be programmed to disable the hybrid (clearing SF1[2] [HBE]), thereby allowing the transmitted signal to be looped back through the receive path. With the above strings a number of points can be probed to determine if the DAA is functioning properly. Assuming a 30 mA loop current, the dc value of the TIP/ RING voltage should be in the neighborhood of 7.5 V. The actual voltage is dependent on the chosen dc Termination. Refer to Figures 14, 15, and 16. The amplitude of the 2225 Hz tone on AOUT should be around 500 mV peak-to-peak, corresponding to amplitude consistent with a -12.9 dBm signal. The digital filters introduce the 0.9 dBm attenuation. The transmitted tone is set to a -12 dBm level so that when the hybrid is disabled, an internal dc offset is realized. The size of this dc offset is approximately half scale. To guarantee no clipping under all conditions, a -12 dBm maximum is recommended. If a slightly distorted signal is acceptable on AOUT, a signal exceeding -12 dBm may be implemented instead using the method shown in step 3 above. In order to complete the production test, it may be necessary to simulate a ring signal. A sine wave pulse of 500 ms with a 20 Hz frequency and an amplitude of 35 VRMS is sufficient for the Si2400 to return an "R" result code. Additional production tests may be employed to check the DAA. For example, a 300 V dc test between TIP and RING can be used to ensure that the hookswitch transistors are operational and are not leaking any significant amount of current. Also, a HIPOT (High Potential such as 1500 V) test applied longitudinally between TIP/RING and GND can be used to ensure that the isolation barrier is not bridged inadvertently. 82 Rev. 1.3 Si2400 Compliance Test Commands The following are compliance test commands: ATS07=4ODT; ATSE8=05\r // go off hook // place DSP in mode 5 (for QAM and DPSK) ATSE5=xx\r // see notes below for setting xx Writes to the ATSE5 register has the following effect when in DSP Mode 5 bit 0 : transmit_ena set to 1 turns the transmitter on. bit 2 : QAM/nDPSK If 0, DPSK algorithm is chosen If 1, QAM algorithm is chosen bit 3 : orig/nans selects between originate mode and answer mode. If 0, answer mode If 1, originate mode bit 4 : When set, enables 550 Hz guard tone bit 5 : When set, enables 1800 Hz guard tone ATSE6=00 ATSE6=FF // sending unscrambled zeros // sending scarmbled ones Rev. 1.3 83 Si2400 APPENDIX B--TYPICAL MODEM APPLICATIONS EXAMPLES Introduction Appendix B outlines the steps required to configure the Si2400 for modem operation under typical examples. The ISOmodem has been designed to be both easy to use and flexible. The Si2400 has many features and modes, which add to the complexity of the device, but are not required for a typical modem configuration. The goal of this appendix is to help the user to quickly make a modem connection and begin evaluation of the Si2400 under various operational examples. Si2400 may echo the following: t - tone dial detected , - dialing complete r - ringback b - busy tone N - No carrier c - connect 6. Next byte after "c" is modem data! Example 4: Bell 103 in Australia with Parallel Phone Detect 1. Power on reset 2. Set Host UART to 2400 bps with CTS flow control 3. ATS07=01 (set for FSK 300 bps) 4. ATSF5=38 (set DAA for Australia) 5. ATSE2=C0 (enable ALERT pin) 6. ATDT18005551212 Example 1: V.22bis in FCC countries 1. Power on reset 2. Set Host UART to 2400 bps 3. ATS07=06 set for QAM 2400 bps 4. ATDT18005551212 Example 2: V.22 in CTR21 countries 1. Power on reset 2. Set Host UART to 2400 bps with CTS flow control 3. ATS07=02 (set for DPSK 1200 bps) 4. ATSF5=1C (set DAA for CTR21) 5. ATSF7=18 (set DAA for CTR21) 6. ATDT18005551212 Example 5: Bell 212A in South Korea with Japanese caller ID 1. Power on reset 2. Set Host UART to 2400 bps with CTS flow control 3. ATS07=00 (set for DPSK 1200 bps) 4. ATSF5=06(set DAA for South Korea) 5. ATS13=80 (set caller ID to Japanese format) When caller ID data is detected, Si2400 will echo "f" indicating the line reversal, "m" indicating the mark, and then caller ID data will follow. 6. ATDT18005551212 Example 3: Bell 103 in Australia 1. Power on reset 2. Set Host UART to 2400 bps with CTS flow control 3. ATS07=01 (set for FSK 300 bps) 4. ATSF5=38 (set DAA for Australia) 5. ATDT18005551212 84 Rev. 1.3 Si2400 APPENDIX C--UL1950 3RD EDITION Designs using the Si2400 pass all overcurrent and overvoltage tests for UL1950 3rd Edition compliance with a couple of considerations. Figure 20 shows the designs that can pass the UL1950 overvoltage tests, as well as electromagnetic emissions. The top schematic of Figure 20 shows the configuration in which the ferrite beads (FB1, FB2) are on the unprotected side of the sidactor (RV1). For this configuration, the current rating of the ferrite beads must be 6 A. The bottom schematic of Figure 20 shows the configuration in which the ferrite beads (FB1, FB2) are C24 on the protected side of the sidactor (RV1). For this design, the ferrite beads can be rated at 200 mA. In a cost-optimized design, it is important to remember that compliance to UL1950 does not always require overvoltage tests. It is best to plan ahead and know which overvoltage tests will apply to your system. System-level elements in the construction, such as fire enclosure and spacing requirements, need to be considered during the design stages. Consult with your Professional Testing Agency during the design of the product to determine which tests apply to your system. 75 @ 100 MHz, 6A 1.25 A FB1 TIP Fuse/PTC RV1 75 @ 100 MHz, 6A FB2 RING C25 Note: In this configuration, C24 and C25 are used for em issions testing. 1000 @ 100 MHz, 200 m A C24 FB1 1.25 A TIP Fuse/PTC RV1 1000 @ 100 MHz, 200 m A FB2 RING C25 Figure 20. Circuits that Pass all UL1950 Overvoltage Tests Rev. 1.3 85 Si2400 9. Pin Descriptions: Si2400 XTALI XTALO CLKOUT VD RXD TXD CTS RESET 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 GPIO1 GPIO2 GPIO3 ISOB GND C1A GPIO4 AOUT Pin # Pin Name Description XTALI--Crystal Oscillator Pin. These pins provide support for parallel resonant, AT cut crystals. XTALI also acts as an input in the event that an external clock source is used in place of a crystal. XTALO--Crystal Oscillator Pin. Serves as the output of the crystal amplifier. A 4.9152 MHz crystal is required or a 4.9152 MHz clock on XTALI. Clock Output. This signal is typically used to clock an output system microcontroller. The frequency is 78.6432 MHz/(N+1), where N is programmable from 0 to 31. N defaults to 7 on power up. Setting N = 0 stops the clock. Digital Supply Voltage. Provides the digital supply voltage to the Si2400. Nominally either 5 V or 3.3 V. Receive Data. Serial communication data from the Si2400. Transmit Data. Serial communication data to the Si2400. Clear to Send. Clear to send output used by the Si2400 to signal that the device is ready to receive more digital data on the TXD pin. Reset Input. An active low input that is used to reset all control registers to a defined, initialized state. Also used to bring the Si2400 out of sleep mode. Analog Speaker Output. Provides an analog output signal for monitoring call progress tones or to output voice data to a speaker. 1 XTALI 2 XTALO 3 CLKOUT 4 VD 5 RXD 6 TXD 7 CTS 8 RESET 9 AOUT 86 Rev. 1.3 Si2400 Pin # Pin Name Description General Purpose Input/Output 4. This pin can be either a GPIO pin (analog in, digital in, digital out) or the ALERT pin. Default is digital in. When programmed as ALERT, this pin provides five functions. While the modem is connected, it will normally be low, but will go high if the carrier is lost, a wake-on ring (using the "ATZ" command) event is detected, a loss of loop current event is detected, V.23 reversal is detected, or if an intrusion event has been detected. The ALERT pin is sticky, and will stay high until the host clears it by writing to the correct S register. (See register SE2[7:6].) Isolation Capacitor 1A. Connects to one side of the isolation capacitor C1. Ground. Connects to the system digital ground. Bias Voltage. This pin should be connected via the C3 capacitor. General Purpose Input/Output 3. This pin can be either a GPIO pin (analog in, digital in, digital out) or the ESC pin. Default is digital in. When programmed as ESC, a positive edge on this pin will cause the modem to go from online (connected) mode to the offline (command) mode. General Purpose Input/Output 2. This pin can be either a GPIO pin (analog in, digital in, digital out) or the TXD2 pin. Default is digital in. The user can program this pin to function as TXD2 if the secondary serial interface is enabled. This pin is also used as the active low carrier detect pin (CD) if enabled via the CDE bit in (S0C.7). General Purpose Input Output 1. This pin can be either a GPIO pin (analog in, digital in, digital out) or the RXD2 pin. Default is digital. The user can program this pin to function as RXD2 if the secondary serial interface is enabled. This pin can also be programmed to function as the EOFR (end of frame receive) signal for HDLC framing. 10 GPIO4 11 C1A 12 GND 13 ISOB 14 GPIO3 15 GPIO2 16 GPIO1 Rev. 1.3 87 Si2400 10. Pin Descriptions: Si3015 QE2 DCT IGND C1B RNG1 RNG2 QB QE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FILT2 FILT RX REXT REXT2 REF VREG2 VREG Table 30. 3015 Pin Descriptions Pin # Pin Name Description Transistor Emitter 2. 1 2 3 4 5 QE2 DCT IGND C1B RNG1 Connects to the emitter of Q4. DC Termination. Provides dc termination to the telephone network Isolated Ground. Connects to ground on the line-side interface. Also connects to capacitor C2. Isolation Capacitor 1B. Connects to one side of isolation capacitor C1. Ring 1. Connects through a capacitor to the TIP lead of the telephone line. Provides the ring and caller ID signals to the Si2400. 6 RNG2 Ring 2. Connects through a capacitor to the RING lead of the telephone line. Provides the ring and caller ID signals to the Si2400. 7 8 9 10 11 12 13 QB QE VREG VREG2 REF REXT2 REXT Transistor Base. Connects to the base of transistor Q3. Transistor Emitter. Connects to the emitter of Q3. Voltage Regulator. Connects to an external capacitor to provide bypassing for an internal power supply. Voltage Regulator 2. Connects to an external capacitor to provide bypassing for an internal power supply. Reference. Connects to an external resistor to provide a high accuracy reference current. External Resistor 2. Sets the complex ac termination impedance. External Resistor. Sets the real ac termination impedance. 88 Rev. 1.3 Si2400 Table 30. 3015 Pin Descriptions (Continued) Pin # Pin Name Description Receive Input. 14 15 16 RX FILT FILT2 Serves as the receive side input from the telephone network. Filter. Provides filtering for the dc termination circuits. Filter 2. Provides filtering for the bias circuits. Rev. 1.3 89 Si2400 11. Ordering Guide Chipset Region System-Side Line-Side Pb-Free Temp. Range Si2400 Si2400 Si2400 Global Global Global Si2400-KS Si2400-BS Si2400-FS Si3015-KS Si3015-BS Si3015-F-FS No No Yes 0 to 70 C -40 to 85 C 0 to 70 C 90 Rev. 1.3 Si2400 12. Package Outline: 16-Pin SOIC Figure 21 illustrates the package details for the Si2400 and Si3015. Table 31 lists the values for the dimensions shown in the illustration. 16 9 h E -BH bbb B L Detail F 1 B 8 aaa C A B -A- D -Ce A1 A C See Detail F Seating Plane Approximate device weight is 152 mg. Figure 21. 16-pin Small Outline Integrated Circuit (SOIC) Package Table 31. Package Diagram Dimensions Symbol Millimeters Min Max 1.35 1.75 .10 .25 .33 .51 .19 .25 9.80 10.00 3.80 4.00 1.27 BSC 5.80 6.20 .25 .50 .40 1.27 0.10 0 8 0.25 0.25 A A1 B C D E e H h L aaa bbb Rev. 1.3 91 Si2400 DOCUMENT CHANGE LIST Revision 1.1 to Revision 1.2 Table 3 on page 6, GPIO1-4 (VOL) changed to 20 mA. Table 4 on page 6, GPIO1-4 (VOL) changed to 15 mA. Table 5 on page 7, Caller ID Common Mode Tolerance added. Updated !7, !1 description of page 34. Added "Compliance Test Commands" on page 83. Register S33 (MDMO)., "Modem Override," on page 57, bit 0 (TSAL) definition corrected. Updated "11.Ordering Guide" on page 90. SOIC outline updated. Revision 1.2 to Revision 1.3 Updated "11.Ordering Guide" on page 90. 92 Rev. 1.3 Si2400 NOTES: Rev. 1.3 93 Si2400 CONTACT INFORMATION Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: ISOinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and ISOmodem are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders 94 Rev. 1.3 |
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